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[69.222.133.165]) by smtp.gmail.com with ESMTPSA id r133sm9940295oib.21.2019.04.08.11.28.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 08 Apr 2019 11:28:20 -0700 (PDT) From: Jan Bobek To: qemu-devel@nongnu.org Date: Mon, 8 Apr 2019 14:27:43 -0400 Message-Id: <20190408182748.1238-1-jan.bobek@gmail.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::342 Subject: [Qemu-devel] [RISU PATCH 0/5] Fix RISU build for i386 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Richard Henderson , Jan Bobek , Stefan Hajnoczi , Peter Maydell Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Hi all, here's a patch series that tries to fix the (currently broken) build of RISU for i386. With the patches applied, I am able to successfully cross-compile and run RISU for i386 on my x86_64 laptop running Debian 10 with: $ CC='cc -m32 -std=c99' LD='ld -m32' AS='nasm -f elf32' ARCH=i386 ./configure $ make $ ./risu --master --trace test_i386.trace test_i386.bin $ ./risu --trace test_i386.trace test_i386.bin There's a couple of points that I'd like to mention/highlight: 1. Most of it is just moving stuff around, however I've implemented reginfo_dump_mismatch (based on reginfo_dump and code in other architectures) and defined EAX as the param register. There is no support for more registers yet, that will need to be added later. 2. Note the '-std=c99' switch in the command-line above; without it, GCC defines the symbol 'i386' to 1 and the preprocessor magic for including arch-specific headers in risu.h breaks. Does anyone have an idea how to fix this in a more robust way? 3. gas (the GNU assembler) chokes on the syntax of test_i386.s; that's why I'm using nasm as the assembler above. Is that intentional? I haven't found the nasm dependency mentioned anywhere. Also, nasm will happily emit the UD1 opcode (0F B9) with no operands (see test_i386.s). That's a bit surprising to me, since Intel's Software Developer's Manual says UD1 has two operands; I'd expect at least a follow-up ModR/M byte. gas refuses to assemble UD1 with no operands, and gdb's disassembler gets confused when I load up the nasm's binary into risu. Is there something obvious that I'm missing? Thanks, -Jan Bobek P.S. This is my first time using git send-email, so please bear with me if something goes wrong and/or let me know how I can improve my future submissions. Thank you! Jan Bobek (5): risu_i386: move reginfo_t and related defines to risu_reginfo_i386.h risu_i386: move reginfo-related code to risu_reginfo_i386.c risu_reginfo_i386: implement arch-specific reginfo interface risu_i386: implement missing CPU-specific functions risu_i386: remove old unused code risu_i386.c | 140 ++++++-------------------------------------- risu_reginfo_i386.c | 104 ++++++++++++++++++++++++++++++++ risu_reginfo_i386.h | 38 ++++++++++++ 3 files changed, 160 insertions(+), 122 deletions(-) create mode 100644 risu_reginfo_i386.c create mode 100644 risu_reginfo_i386.h