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[0/4] target/arm: four minor M-profile bug fixes

Message ID 20190430131439.25251-1-peter.maydell@linaro.org (mailing list archive)
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Series target/arm: four minor M-profile bug fixes | expand

Message

Peter Maydell April 30, 2019, 1:14 p.m. UTC 
These patches are fixes for some minor bugs that I noticed while
writing and testing the M-profile FPU support. They're not FPU
related, so I didn't want to mix them up with that large patchset...

thanks
-- PMM

Peter Maydell (4):
  hw/arm/armv7m_nvic: Check subpriority in nvic_recompute_state_secure()
  hw/intc/armv7m_nvic: NS BFAR and BFSR are RAZ/WI if BFHFNMINS == 0
  hw/intc/armv7m_nvic: Don't enable ARMV7M_EXCP_DEBUG from reset
  target/arm: Implement XPSR GE bits

 target/arm/cpu.h      |  4 ++++
 hw/intc/armv7m_nvic.c | 40 ++++++++++++++++++++++++++++++++++------
 target/arm/helper.c   | 12 ++++++++++--
 3 files changed, 48 insertions(+), 8 deletions(-)

Comments

Richard Henderson April 30, 2019, 5:40 p.m. UTC | #1 
On 4/30/19 6:14 AM, Peter Maydell wrote:
> Peter Maydell (4):
>   hw/arm/armv7m_nvic: Check subpriority in nvic_recompute_state_secure()
>   hw/intc/armv7m_nvic: NS BFAR and BFSR are RAZ/WI if BFHFNMINS == 0
>   hw/intc/armv7m_nvic: Don't enable ARMV7M_EXCP_DEBUG from reset
>   target/arm: Implement XPSR GE bits

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~