From patchwork Tue May 14 06:14:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 10942337 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E36CD14DB for ; Tue, 14 May 2019 06:19:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D3B06284E8 for ; Tue, 14 May 2019 06:19:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C8079285DA; Tue, 14 May 2019 06:19:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5C50E284E8 for ; Tue, 14 May 2019 06:19:44 +0000 (UTC) Received: from localhost ([127.0.0.1]:40112 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hQQmt-0007H6-KW for patchwork-qemu-devel@patchwork.kernel.org; Tue, 14 May 2019 02:19:43 -0400 Received: from eggs.gnu.org ([209.51.188.92]:51879) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hQQig-0003Y1-RD for qemu-devel@nongnu.org; Tue, 14 May 2019 02:15:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hQQif-0007fP-6Z for qemu-devel@nongnu.org; Tue, 14 May 2019 02:15:22 -0400 Received: from mail01.asahi-net.or.jp ([202.224.55.13]:34370) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hQQid-0007VY-4h for qemu-devel@nongnu.org; Tue, 14 May 2019 02:15:21 -0400 Received: from h61-195-96-97.vps.ablenet.jp (h61-195-96-97.vps.ablenet.jp [61.195.96.97]) (Authenticated sender: PQ4Y-STU) by mail01.asahi-net.or.jp (Postfix) with ESMTPA id 744AB11D011; Tue, 14 May 2019 15:15:13 +0900 (JST) Received: from ysato.dip.jp (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by h61-195-96-97.vps.ablenet.jp (Postfix) with ESMTPSA id 7B245240085; Tue, 14 May 2019 15:15:11 +0900 (JST) From: Yoshinori Sato To: qemu-devel@nongnu.org Date: Tue, 14 May 2019 15:14:46 +0900 Message-Id: <20190514061458.125225-1-ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.11.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 202.224.55.13 Subject: [Qemu-devel] [PATCH v12 00/12] Add RX archtecture support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, richard.henderson@linaro.org, Yoshinori Sato , philmd@redhat.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Hello. This patch series is added Renesas RX target emulation. I fixed the ROM address because v11 was incorrect. My git repository is bellow. git://git.pf.osdn.net/gitroot/y/ys/ysato/qemu.git tags/rx-20190514 Testing binaries bellow. u-boot Download - https://osdn.net/users/ysato/pf/qemu/dl/u-boot.bin.gz starting $ gzip -d u-boot.bin.gz $ qemu-system-rx -bios u-boot.bin linux and pico-root (only sash) Download - https://osdn.net/users/ysato/pf/qemu/dl/zImage (kernel) https://osdn.net/users/ysato/pf/qemu/dl/rx-qemu.dtb (DeviceTree) starting $ qemu-system-rx -kernel zImage -dtb rx-qemu.dtb -append "earlycon" Changes for v11. - Fix ROM address. Yoshinori Sato (12): target/rx: TCG translation target/rx: TCG helper target/rx: CPU definition target/rx: RX disassembler hw/intc: RX62N interrupt controller (ICUa) hw/timer: RX62N internal timer modules hw/char: RX62N serial communication interface (SCI) hw/rx: RX Target hardware definition Add rx-softmmu hw/registerfields.h: Add 8bit and 16bit register macros. qemu/bitops.h: Add extract8 and extract16 MAINTAINERS: Add RX configure | 8 + default-configs/rx-softmmu.mak | 3 + include/disas/dis-asm.h | 5 + include/hw/char/renesas_sci.h | 45 + include/hw/intc/rx_icu.h | 57 + include/hw/registerfields.h | 32 +- include/hw/rx/rx.h | 7 + include/hw/rx/rx62n.h | 94 ++ include/hw/timer/renesas_cmt.h | 38 + include/hw/timer/renesas_tmr.h | 50 + include/qemu/bitops.h | 38 + include/sysemu/arch_init.h | 1 + target/rx/cpu.h | 227 ++++ target/rx/helper.h | 31 + arch_init.c | 2 + hw/char/renesas_sci.c | 340 ++++++ hw/intc/rx_icu.c | 376 +++++++ hw/rx/rx-virt.c | 105 ++ hw/rx/rx62n.c | 238 ++++ hw/timer/renesas_cmt.c | 275 +++++ hw/timer/renesas_tmr.c | 455 ++++++++ target/rx/cpu.c | 222 ++++ target/rx/disas.c | 1480 ++++++++++++++++++++++++ target/rx/gdbstub.c | 112 ++ target/rx/helper.c | 148 +++ target/rx/monitor.c | 38 + target/rx/op_helper.c | 481 ++++++++ target/rx/translate.c | 2432 ++++++++++++++++++++++++++++++++++++++++ MAINTAINERS | 19 + hw/Kconfig | 1 + hw/char/Kconfig | 3 + hw/char/Makefile.objs | 1 + hw/intc/Kconfig | 3 + hw/intc/Makefile.objs | 1 + hw/rx/Kconfig | 14 + hw/rx/Makefile.objs | 2 + hw/timer/Kconfig | 6 + hw/timer/Makefile.objs | 3 + target/rx/Makefile.objs | 12 + target/rx/insns.decode | 621 ++++++++++ 40 files changed, 8025 insertions(+), 1 deletion(-) create mode 100644 default-configs/rx-softmmu.mak create mode 100644 include/hw/char/renesas_sci.h create mode 100644 include/hw/intc/rx_icu.h create mode 100644 include/hw/rx/rx.h create mode 100644 include/hw/rx/rx62n.h create mode 100644 include/hw/timer/renesas_cmt.h create mode 100644 include/hw/timer/renesas_tmr.h create mode 100644 target/rx/cpu.h create mode 100644 target/rx/helper.h create mode 100644 hw/char/renesas_sci.c create mode 100644 hw/intc/rx_icu.c create mode 100644 hw/rx/rx-virt.c create mode 100644 hw/rx/rx62n.c create mode 100644 hw/timer/renesas_cmt.c create mode 100644 hw/timer/renesas_tmr.c create mode 100644 target/rx/cpu.c create mode 100644 target/rx/disas.c create mode 100644 target/rx/gdbstub.c create mode 100644 target/rx/helper.c create mode 100644 target/rx/monitor.c create mode 100644 target/rx/op_helper.c create mode 100644 target/rx/translate.c create mode 100644 hw/rx/Kconfig create mode 100644 hw/rx/Makefile.objs create mode 100644 target/rx/Makefile.objs create mode 100644 target/rx/insns.decode