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[88.21.201.14]) by smtp.gmail.com with ESMTPSA id m18sm3993873wrg.97.2019.10.17.15.58.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Oct 2019 15:58:03 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH v2 00/10] hw/arm/raspi: Add thermal/timer, improve multicore address space Date: Fri, 18 Oct 2019 00:57:50 +0200 Message-Id: <20191017225800.6946-1-f4bug@amsat.org> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::441 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Herring , Peter Maydell , Alistair Francis , PhilMD , Andrew Baumann , Pekka Enberg , Esteban Bosse , qemu-arm@nongnu.org, Pete Batard , Cleber Rosa , Laurent Bonnans , Cheng Xiang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Clement Deschamps Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: PhilMD Hi, Some patches from v1 are already merged. This v2 addresses the review comment from v1, and add patches to clean the memory space when using multiple cores. Laurent, if you test U-Boot with this patchset again, do you mind replying with a "Tested-by:" tag? The next patchset is probably about the interrupt controller blocks, then will come another one about the MBox/Properties. The last patch is unrelated to the series, but since I cleaned this for the raspi and the highbank is the only board with the same issue, I included the patch in this series. Please review. Regards, Phil. Philippe Mathieu-Daudé (10): hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor hw/arm/bcm2835_peripherals: Use the thermal sensor block hw/timer/bcm2835: Add the BCM2835 SYS_timer hw/arm/bcm2835_peripherals: Use the SYS_timer hw/arm/bcm2836: Make the SoC code modular hw/arm/bcm2836: Create VideoCore address space in the SoC hw/arm/bcm2836: Use per CPU address spaces hw/arm/raspi: Use AddressSpace when using arm_boot::write_secondary_boot hw/arm/raspi: Make the board code modular hw/arm/highbank: Use AddressSpace when using write_secondary_boot() hw/arm/bcm2835_peripherals.c | 73 +++++++----- hw/arm/bcm2836.c | 91 ++++++++++++--- hw/arm/highbank.c | 3 +- hw/arm/raspi.c | 123 ++++++++++++++++---- hw/misc/Makefile.objs | 1 + hw/misc/bcm2835_thermal.c | 135 ++++++++++++++++++++++ hw/timer/Makefile.objs | 1 + hw/timer/bcm2835_systmr.c | 166 +++++++++++++++++++++++++++ hw/timer/trace-events | 5 + include/hw/arm/bcm2835_peripherals.h | 9 +- include/hw/arm/bcm2836.h | 11 ++ include/hw/arm/raspi_platform.h | 1 + include/hw/misc/bcm2835_thermal.h | 27 +++++ include/hw/timer/bcm2835_systmr.h | 33 ++++++ 14 files changed, 610 insertions(+), 69 deletions(-) create mode 100644 hw/misc/bcm2835_thermal.c create mode 100644 hw/timer/bcm2835_systmr.c create mode 100644 include/hw/misc/bcm2835_thermal.h create mode 100644 include/hw/timer/bcm2835_systmr.h