mbox series

[RFC,v2,0/9] Add riscv kvm accel support

Message ID 20200411041427.14828-1-jiangyifei@huawei.com (mailing list archive)
Headers show
Series Add riscv kvm accel support | expand

Message

Yifei Jiang April 11, 2020, 4:14 a.m. UTC
This series adds both riscv32 and riscv64 kvm support, It is based on
riscv_kvm_master branch at https://github.com/kvm-riscv/linux.

This series depends on above pending changes which haven't yet been
accepted, so this QEMU patch series is blocked until that dependency
has been dealt with, but is worth reviewing anyway.

Several steps to use this:
1. Build emulation
$ ./configure --target-list=riscv64-softmmu
$ make -j$(nproc)

2. Build kernel
riscv_kvm_master branch at https://github.com/kvm-riscv/linux

3. Build QEMU VM
I cross built in riscv toolchain.
$ PKG_CONFIG_LIBDIR=<toolchain pkgconfig path>
$ export PKG_CONFIG_SYSROOT_DIR=<toolchain sysroot path>
$ ./configure --target-list=riscv64-softmmu --enable-kvm \
--cross-prefix=riscv64-linux-gnu- --disable-libiscsi --disable-glusterfs \
--disable-libusb --disable-usb-redir --audio-drv-list= --disable-opengl \
--disable-libxml2
$ make -j$(nproc)

4. Start emulation
$ ./qemu-system-riscv64 -M virt -m 4096M -cpu rv64,x-h=true -nographic \
        -name guest=riscv-hyp,debug-threads=on \
        -smp 4 \
        -kernel ./fw_jump.elf \
        -device loader,file=./Image,addr=0x80200000 \
        -drive file=./hyp.img,format=raw,id=hd0 \
        -device virtio-blk-device,drive=hd0 \
        -append "root=/dev/vda rw console=ttyS0 earlycon=sbi"

5. Start kvm-acceled QEMU VM in emulation
$ ./qemu-system-riscv64 -M virt,accel=kvm -m 1024M -cpu host -nographic \
        -name guest=riscv-guset \
         -smp 2 \
        -kernel ./Image \
        -drive file=./guest.img,format=raw,id=hd0 \
        -device virtio-blk-device,drive=hd0 \
        -append "root=/dev/vda rw console=ttyS0 earlycon=sbi"

Changes since RFC v1
1、Add separate SBI ecall interface header.
2、Add riscv32 kvm accel support.

Yifei Jiang (9):
  linux-header: Update linux/kvm.h
  target/riscv: Add target/riscv/kvm.c to place the public kvm interface
  target/riscv: Implement function kvm_arch_init_vcpu
  target/riscv: Implement kvm_arch_get_registers
  target/riscv: Implement kvm_arch_put_registers
  target/riscv: Support start kernel directly by KVM
  hw/riscv: PLIC update external interrupt by KVM when kvm enabled
  target/riscv: Handler KVM_EXIT_RISCV_SBI exit
  target/riscv: add host cpu type

 configure                          |   1 +
 hw/riscv/sifive_plic.c             |  31 +-
 hw/riscv/virt.c                    |  16 +-
 linux-headers/linux/kvm.h          |   8 +
 target/riscv/Makefile.objs         |   1 +
 target/riscv/cpu.c                 |  10 +
 target/riscv/cpu.h                 |   4 +
 target/riscv/kvm.c                 | 501 +++++++++++++++++++++++++++++
 target/riscv/kvm_riscv.h           |  25 ++
 target/riscv/sbi_ecall_interface.h |  72 +++++
 10 files changed, 657 insertions(+), 12 deletions(-)
 create mode 100644 target/riscv/kvm.c
 create mode 100644 target/riscv/kvm_riscv.h
 create mode 100644 target/riscv/sbi_ecall_interface.h

Comments

no-reply@patchew.org April 11, 2020, 5:47 a.m. UTC | #1
Patchew URL: https://patchew.org/QEMU/20200411041427.14828-1-jiangyifei@huawei.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Subject: [PATCH RFC v2 0/9] Add riscv kvm accel support
Message-id: 20200411041427.14828-1-jiangyifei@huawei.com
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Switched to a new branch 'test'
3705618 target/riscv: add host cpu type
efb216c target/riscv: Handler KVM_EXIT_RISCV_SBI exit
56aa404 hw/riscv: PLIC update external interrupt by KVM when kvm enabled
86280f4 target/riscv: Support start kernel directly by KVM
629e8e1 target/riscv: Implement kvm_arch_put_registers
c0a354d target/riscv: Implement kvm_arch_get_registers
689729d target/riscv: Implement function kvm_arch_init_vcpu
6e0b31c target/riscv: Add target/riscv/kvm.c to place the public kvm interface
e8f7f24 linux-header: Update linux/kvm.h

=== OUTPUT BEGIN ===
1/9 Checking commit e8f7f24b4bb3 (linux-header: Update linux/kvm.h)
2/9 Checking commit 6e0b31c6be80 (target/riscv: Add target/riscv/kvm.c to place the public kvm interface)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#38: 
new file mode 100644

total: 0 errors, 1 warnings, 141 lines checked

Patch 2/9 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
3/9 Checking commit 689729d06f73 (target/riscv: Implement function kvm_arch_init_vcpu)
4/9 Checking commit c0a354dd075c (target/riscv: Implement kvm_arch_get_registers)
5/9 Checking commit 629e8e18e44d (target/riscv: Implement kvm_arch_put_registers)
6/9 Checking commit 86280f4d8337 (target/riscv: Support start kernel directly by KVM)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#132: 
new file mode 100644

total: 0 errors, 1 warnings, 115 lines checked

Patch 6/9 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
7/9 Checking commit 56aa404c8db0 (hw/riscv: PLIC update external interrupt by KVM when kvm enabled)
8/9 Checking commit efb216c472d6 (target/riscv: Handler KVM_EXIT_RISCV_SBI exit)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#80: 
new file mode 100644

WARNING: architecture specific defines should be avoided
#94: FILE: target/riscv/sbi_ecall_interface.h:10:
+#ifndef __SBI_ECALL_INTERFACE_H__

ERROR: code indent should never use tabs
#100: FILE: target/riscv/sbi_ecall_interface.h:16:
+#define^ISBI_EXT_0_1_SET_TIMER^I^I^I0x0$

ERROR: code indent should never use tabs
#101: FILE: target/riscv/sbi_ecall_interface.h:17:
+#define SBI_EXT_0_1_CONSOLE_PUTCHAR^I^I0x1$

ERROR: code indent should never use tabs
#102: FILE: target/riscv/sbi_ecall_interface.h:18:
+#define SBI_EXT_0_1_CONSOLE_GETCHAR^I^I0x2$

ERROR: code indent should never use tabs
#103: FILE: target/riscv/sbi_ecall_interface.h:19:
+#define SBI_EXT_0_1_CLEAR_IPI^I^I^I0x3$

ERROR: code indent should never use tabs
#104: FILE: target/riscv/sbi_ecall_interface.h:20:
+#define SBI_EXT_0_1_SEND_IPI^I^I^I0x4$

ERROR: code indent should never use tabs
#105: FILE: target/riscv/sbi_ecall_interface.h:21:
+#define SBI_EXT_0_1_REMOTE_FENCE_I^I^I0x5$

ERROR: code indent should never use tabs
#106: FILE: target/riscv/sbi_ecall_interface.h:22:
+#define SBI_EXT_0_1_REMOTE_SFENCE_VMA^I^I0x6$

ERROR: code indent should never use tabs
#107: FILE: target/riscv/sbi_ecall_interface.h:23:
+#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID^I0x7$

ERROR: code indent should never use tabs
#108: FILE: target/riscv/sbi_ecall_interface.h:24:
+#define SBI_EXT_0_1_SHUTDOWN^I^I^I0x8$

ERROR: code indent should never use tabs
#109: FILE: target/riscv/sbi_ecall_interface.h:25:
+#define SBI_EXT_BASE^I^I^I^I0x10$

ERROR: code indent should never use tabs
#110: FILE: target/riscv/sbi_ecall_interface.h:26:
+#define SBI_EXT_TIME^I^I^I^I0x54494D45$

ERROR: code indent should never use tabs
#111: FILE: target/riscv/sbi_ecall_interface.h:27:
+#define SBI_EXT_IPI^I^I^I^I0x735049$

ERROR: code indent should never use tabs
#112: FILE: target/riscv/sbi_ecall_interface.h:28:
+#define SBI_EXT_RFENCE^I^I^I^I0x52464E43$

ERROR: code indent should never use tabs
#113: FILE: target/riscv/sbi_ecall_interface.h:29:
+#define SBI_EXT_HSM^I^I^I^I0x48534D$

ERROR: code indent should never use tabs
#116: FILE: target/riscv/sbi_ecall_interface.h:32:
+#define SBI_EXT_BASE_GET_SPEC_VERSION^I^I0x0$

ERROR: code indent should never use tabs
#117: FILE: target/riscv/sbi_ecall_interface.h:33:
+#define SBI_EXT_BASE_GET_IMP_ID^I^I^I0x1$

ERROR: code indent should never use tabs
#118: FILE: target/riscv/sbi_ecall_interface.h:34:
+#define SBI_EXT_BASE_GET_IMP_VERSION^I^I0x2$

ERROR: code indent should never use tabs
#119: FILE: target/riscv/sbi_ecall_interface.h:35:
+#define SBI_EXT_BASE_PROBE_EXT^I^I^I0x3$

ERROR: code indent should never use tabs
#120: FILE: target/riscv/sbi_ecall_interface.h:36:
+#define SBI_EXT_BASE_GET_MVENDORID^I^I0x4$

ERROR: code indent should never use tabs
#121: FILE: target/riscv/sbi_ecall_interface.h:37:
+#define SBI_EXT_BASE_GET_MARCHID^I^I0x5$

ERROR: code indent should never use tabs
#122: FILE: target/riscv/sbi_ecall_interface.h:38:
+#define SBI_EXT_BASE_GET_MIMPID^I^I^I0x6$

ERROR: code indent should never use tabs
#125: FILE: target/riscv/sbi_ecall_interface.h:41:
+#define SBI_EXT_TIME_SET_TIMER^I^I^I0x0$

ERROR: code indent should never use tabs
#128: FILE: target/riscv/sbi_ecall_interface.h:44:
+#define SBI_EXT_IPI_SEND_IPI^I^I^I0x0$

ERROR: code indent should never use tabs
#131: FILE: target/riscv/sbi_ecall_interface.h:47:
+#define SBI_EXT_RFENCE_REMOTE_FENCE_I^I^I0x0$

ERROR: code indent should never use tabs
#132: FILE: target/riscv/sbi_ecall_interface.h:48:
+#define SBI_EXT_RFENCE_REMOTE_SFENCE_VMA^I0x1$

ERROR: code indent should never use tabs
#133: FILE: target/riscv/sbi_ecall_interface.h:49:
+#define SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID^I0x2$

ERROR: code indent should never use tabs
#134: FILE: target/riscv/sbi_ecall_interface.h:50:
+#define SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA^I0x3$

ERROR: code indent should never use tabs
#135: FILE: target/riscv/sbi_ecall_interface.h:51:
+#define SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID^I0x4$

ERROR: code indent should never use tabs
#136: FILE: target/riscv/sbi_ecall_interface.h:52:
+#define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA^I0x5$

ERROR: code indent should never use tabs
#137: FILE: target/riscv/sbi_ecall_interface.h:53:
+#define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID^I0x6$

ERROR: code indent should never use tabs
#140: FILE: target/riscv/sbi_ecall_interface.h:56:
+#define SBI_EXT_HSM_HART_START^I^I^I0x0$

ERROR: code indent should never use tabs
#141: FILE: target/riscv/sbi_ecall_interface.h:57:
+#define SBI_EXT_HSM_HART_STOP^I^I^I0x1$

ERROR: code indent should never use tabs
#142: FILE: target/riscv/sbi_ecall_interface.h:58:
+#define SBI_EXT_HSM_HART_GET_STATUS^I^I0x2$

ERROR: code indent should never use tabs
#144: FILE: target/riscv/sbi_ecall_interface.h:60:
+#define SBI_HSM_HART_STATUS_STARTED^I^I0x0$

ERROR: code indent should never use tabs
#145: FILE: target/riscv/sbi_ecall_interface.h:61:
+#define SBI_HSM_HART_STATUS_STOPPED^I^I0x1$

ERROR: code indent should never use tabs
#146: FILE: target/riscv/sbi_ecall_interface.h:62:
+#define SBI_HSM_HART_STATUS_START_PENDING^I0x2$

ERROR: code indent should never use tabs
#147: FILE: target/riscv/sbi_ecall_interface.h:63:
+#define SBI_HSM_HART_STATUS_STOP_PENDING^I0x3$

ERROR: code indent should never use tabs
#149: FILE: target/riscv/sbi_ecall_interface.h:65:
+#define SBI_SPEC_VERSION_MAJOR_OFFSET^I^I24$

ERROR: code indent should never use tabs
#150: FILE: target/riscv/sbi_ecall_interface.h:66:
+#define SBI_SPEC_VERSION_MAJOR_MASK^I^I0x7f$

ERROR: code indent should never use tabs
#151: FILE: target/riscv/sbi_ecall_interface.h:67:
+#define SBI_SPEC_VERSION_MINOR_MASK^I^I0xffffff$

ERROR: code indent should never use tabs
#152: FILE: target/riscv/sbi_ecall_interface.h:68:
+#define SBI_EXT_VENDOR_START^I^I^I0x09000000$

ERROR: code indent should never use tabs
#153: FILE: target/riscv/sbi_ecall_interface.h:69:
+#define SBI_EXT_VENDOR_END^I^I^I0x09FFFFFF$

total: 42 errors, 2 warnings, 128 lines checked

Patch 8/9 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

9/9 Checking commit 3705618846a1 (target/riscv: add host cpu type)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20200411041427.14828-1-jiangyifei@huawei.com/testing.checkpatch/?type=message.
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