| Message ID | 20200605041733.415188-1-richard.henderson@linaro.org (mailing list archive) |
|---|---|
| Headers | show |
| Series | target-arm: Implement ARMv8.5-MemTag, user mode | expand |
On Fri, 5 Jun 2020 at 05:17, Richard Henderson <richard.henderson@linaro.org> wrote: > > Version 1 was back in October: > https://patchew.org/QEMU/20191015163254.12041-1-richard.henderson@linaro.org/ > > Although that post claims there was an actual v1 in March 2019, > I can't locate it, so... whatever. > > This version -- call it 2 -- is the first attempt to implement the > actual in-progress kernel abi, rather than making up a private abi: > > https://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git/log/?h=devel/mte-v4 > > Based-on: 20200603011317.473934-1-richard.henderson@linaro.org > ("target/arm: Implement ARMv8.5-MemTag, system mode") > Based-on: 20200520172800.8499-1-richard.henderson@linaro.org > ("linux-user: User support for AArch64 BTI") > > The full tree is available at: > https://github.com/rth7680/qemu/tree/tgt-arm-mte-user I've reviewed most of this series; the later parts look ok but they're implementations of an ABI that hasn't yet gone into the kernel so I haven't bothered to look closely at the details. thanks -- PMM
Version 1 was back in October: https://patchew.org/QEMU/20191015163254.12041-1-richard.henderson@linaro.org/ Although that post claims there was an actual v1 in March 2019, I can't locate it, so... whatever. This version -- call it 2 -- is the first attempt to implement the actual in-progress kernel abi, rather than making up a private abi: https://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git/log/?h=devel/mte-v4 Based-on: 20200603011317.473934-1-richard.henderson@linaro.org ("target/arm: Implement ARMv8.5-MemTag, system mode") Based-on: 20200520172800.8499-1-richard.henderson@linaro.org ("linux-user: User support for AArch64 BTI") The full tree is available at: https://github.com/rth7680/qemu/tree/tgt-arm-mte-user r~ Richard Henderson (17): tcg: Introduce target-specific page data for user-only linux-user: Introduce PAGE_ANON linux-user: Check for overflow in access_ok linux-user: Tidy VERIFY_READ/VERIFY_WRITE bsd-user: Tidy VERIFY_READ/VERIFY_WRITE linux-user: Do not use guest_addr_valid for h2g_valid linux-user: Fix guest_addr_valid vs reserved_va exec: Add support for TARGET_TAGGED_ADDRESSES linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE linux-user/aarch64: Implement PR_MTE_TCF and PR_MTE_TAG linux-user/aarch64: Implement PROT_MTE linux-user/aarch64: Pass syndrome to EXC_*_ABORT linux-user/aarch64: Signal SEGV_MTESERR for sync tag check fault linux-user/aarch64: Signal SEGV_MTEAERR for async tag check error target/arm: Add allocation tag storage for user mode target/arm: Enable MTE for user-only tests/tcg/aarch64: Add mte smoke tests bsd-user/qemu.h | 9 ++-- include/exec/cpu-all.h | 23 ++++++--- include/exec/cpu_ldst.h | 40 +++++++++++----- linux-user/aarch64/target_signal.h | 3 ++ linux-user/aarch64/target_syscall.h | 13 +++++ linux-user/qemu.h | 19 +++++--- linux-user/syscall_defs.h | 1 + target/arm/cpu-param.h | 3 ++ tests/tcg/aarch64/mte.h | 54 +++++++++++++++++++++ accel/tcg/translate-all.c | 28 +++++++++++ bsd-user/main.c | 5 ++ linux-user/aarch64/cpu_loop.c | 60 +++++++++++++++++++----- linux-user/main.c | 5 ++ linux-user/mmap.c | 28 +++++++---- linux-user/syscall.c | 73 ++++++++++++++++++++++++++++- target/arm/cpu.c | 17 +++++++ target/arm/mte_helper.c | 39 ++++++++++++++- target/arm/tlb_helper.c | 27 ++++++++--- tests/tcg/aarch64/mte-1.c | 25 ++++++++++ tests/tcg/aarch64/mte-2.c | 42 +++++++++++++++++ tests/tcg/aarch64/mte-3.c | 47 +++++++++++++++++++ tests/tcg/aarch64/Makefile.target | 4 ++ 22 files changed, 502 insertions(+), 63 deletions(-) create mode 100644 tests/tcg/aarch64/mte.h create mode 100644 tests/tcg/aarch64/mte-1.c create mode 100644 tests/tcg/aarch64/mte-2.c create mode 100644 tests/tcg/aarch64/mte-3.c