From patchwork Tue Jul 7 13:58:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudio Fontana X-Patchwork-Id: 11648649 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 35CAC60D for ; Tue, 7 Jul 2020 13:58:54 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CA14020738 for ; Tue, 7 Jul 2020 13:58:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CA14020738 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:41646 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jso7Y-0004u8-Qd for patchwork-qemu-devel@patchwork.kernel.org; Tue, 07 Jul 2020 09:58:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54122) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jso6z-0003iC-9i for qemu-devel@nongnu.org; Tue, 07 Jul 2020 09:58:17 -0400 Received: from mx2.suse.de ([195.135.220.15]:45906) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jso6w-0007FS-U5 for qemu-devel@nongnu.org; Tue, 07 Jul 2020 09:58:16 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id D9ECAAD68; Tue, 7 Jul 2020 13:58:13 +0000 (UTC) From: Claudio Fontana To: Paolo Bonzini , Thomas Huth , Laurent Vivier , =?utf-8?q?Alex_Benn=C3=A9e?= , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Roman Bolshakov , Markus Armbruster Subject: [RFC v2 0/6] QEMU cpus.c refactoring part2 Date: Tue, 7 Jul 2020 15:58:02 +0200 Message-Id: <20200707135808.9241-1-cfontana@suse.de> X-Mailer: git-send-email 2.16.4 Received-SPF: pass client-ip=195.135.220.15; envelope-from=cfontana@suse.de; helo=mx2.suse.de X-detected-operating-system: by eggs.gnu.org: First seen = 2020/07/06 23:42:16 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x (no timestamps) [generic] X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Marcelo Tosatti , qemu-devel@nongnu.org, haxm-team@intel.com, Wenchao Wang , Sunil Muthuswamy , Richard Henderson , Claudio Fontana , Colin Xu Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Motivation and higher level steps: https://lists.gnu.org/archive/html/qemu-devel/2020-05/msg04628.html This is based on and requires "QEMU cpus.c refactoring part1": https://lists.gnu.org/archive/html/qemu-devel/2020-06/msg09401.html OPEN ITEMS: * needs review * requires HVF patches before this can be committed (Roman). RFC v1 -> v2: * split the cpus.c accelerator refactoring into 6 patches. * other minor changes to be able to proceed step by step. ---- * Rebased on commit 255ae6e2158c743717bed76c9a2365ee4bcd326e, "replay: notify the main loop when there are no instructions" [SPLIT into part1 and part2] ---- v6 -> v7: * rebased changes on top of Pavel Dovgalyuk changes to dma-helpers.c "icount: make dma reads deterministic" ---- v5 -> v6: * rebased changes on top of Emilio G. Cota changes to cpus.c "cpu: convert queued work to a QSIMPLEQ" * keep a pointer in cpus.c instead of a copy of CpusAccel (Alex) ---- v4 -> v5: rebase on latest master * rebased changes on top of roman series to remove one of the extra states for hvf. (Is the result now functional for HVF?) * rebased changes on top of icount changes and fixes to icount_configure and the new shift vmstate. (Markus) v3 -> v4: * overall: added copyright headers to all files that were missing them (used copyright and license of the module the stuff was extracted from). For the new interface files, added SUSE LLC. * 1/4 (move softmmu only files from root): MAINTAINERS: moved softmmu/cpus.c to its final location (from patch 2) * 2/4 (cpu-throttle): MAINTAINERS (to patch 1), copyright Fabrice Bellard and license from cpus.c * 3/4 (cpu-timers, icount): - MAINTAINERS: add cpu-timers.c and icount.c to Paolo - break very long lines (patchew) - add copyright SUSE LLC, GPLv2 to cpu-timers.h - add copyright Fabrice Bellard and license from cpus.c to timers-state.h as it is lifted from cpus.c - vl.c: in configure_accelerators bail out if icount_enabled() and !tcg_enabled() as qtest does not enable icount anymore. * 4/4 (accel stuff to accel): - add copyright SUSE LLC to files that mostly only consist of the new interface. Add whatever copyright was in the accelerator code if instead they mostly consist of accelerator code. - change a comment to mention the result of the AccelClass experiment - moved qtest accelerator into accel/qtest/ , make it like the others. - rename xxx-cpus-interface to xxx-cpus (remove "interface" from names) - rename accel_int to cpus_accel - rename CpusAccel functions from cpu_synchronize_* to synchronize_* -------- v2 -> v3: * turned into a 4 patch series, adding a first patch moving softmmu code currently in top_srcdir to softmmu/ * cpu-throttle: moved to softmmu/ * cpu-timers, icount: - moved to softmmu/ - fixed assumption of qtest_enabled() => icount_enabled() causing the failure of check-qtest-arm goal, in test-arm-mptimer.c Fix is in hw/core/ptimer.c, where the artificial timeout rate limit should not be applied under qtest_enabled(), in a similar way to how it is not applied for icount_enabled(). * CpuAccelInterface: no change. -------- v1 -> v2: * 1/3 (cpu-throttle): provide a description in the commit message * 2/3 (cpu-timers, icount): in this v2 separate icount from cpu-timers, as icount is actually TCG-specific. Only build it under CONFIG_TCG. To do this, qtest had to be detached from icount. To this end, a trivial global counter for qtest has been introduced. * 3/3 (CpuAccelInterface): provided a description. This is point 8) in that plan. The idea is to extract the unrelated parts in cpus, and register interfaces from each single accelerator to the main cpus module (cpus.c). While doing this RFC, I noticed some assumptions about Windows being either TCG or HAX (not considering WHPX) that might need to be revisited. I added a comment there. The thing builds successfully based on Linux cross-compilations for windows/hax, windows/whpx, and I got a good build on Darwin/hvf. Tests run successully for tcg and kvm configurations, but did not test on windows or darwin. Welcome your feedback and help on this, Claudio Claudio Fontana (6): cpus: extract out TCG-specific code to accel/tcg cpus: extract out qtest-specific code to accel/qtest cpus: extract out kvm-specific code to accel/kvm cpus: extract out hax-specific code to target/i386/ cpus: extract out whpx-specific code to target/i386/ cpus: extract out hvf-specific code to target/i386/hvf/ MAINTAINERS | 3 +- accel/Makefile.objs | 2 +- accel/kvm/Makefile.objs | 2 + accel/kvm/kvm-all.c | 14 +- accel/kvm/kvm-cpus.c | 94 +++++ accel/kvm/kvm-cpus.h | 17 + accel/qtest/Makefile.objs | 2 + accel/qtest/qtest-cpus.c | 104 +++++ accel/qtest/qtest-cpus.h | 17 + accel/{ => qtest}/qtest.c | 7 + accel/stubs/kvm-stub.c | 3 +- accel/tcg/Makefile.objs | 1 + accel/tcg/tcg-all.c | 12 +- accel/tcg/tcg-cpus.c | 532 ++++++++++++++++++++++++ accel/tcg/tcg-cpus.h | 17 + hw/core/cpu.c | 1 + include/sysemu/cpus.h | 33 ++ include/sysemu/hw_accel.h | 57 +-- include/sysemu/kvm.h | 2 +- softmmu/cpus.c | 917 ++++-------------------------------------- stubs/Makefile.objs | 1 + stubs/cpu-synchronize-state.c | 15 + target/i386/Makefile.objs | 7 +- target/i386/hax-all.c | 6 +- target/i386/hax-cpus.c | 85 ++++ target/i386/hax-cpus.h | 17 + target/i386/hax-i386.h | 2 + target/i386/hax-posix.c | 12 + target/i386/hax-windows.c | 20 + target/i386/hvf/Makefile.objs | 2 +- target/i386/hvf/hvf-cpus.c | 141 +++++++ target/i386/hvf/hvf-cpus.h | 17 + target/i386/hvf/hvf.c | 3 + target/i386/whpx-all.c | 3 + target/i386/whpx-cpus.c | 96 +++++ target/i386/whpx-cpus.h | 17 + 36 files changed, 1368 insertions(+), 913 deletions(-) create mode 100644 accel/kvm/kvm-cpus.c create mode 100644 accel/kvm/kvm-cpus.h create mode 100644 accel/qtest/Makefile.objs create mode 100644 accel/qtest/qtest-cpus.c create mode 100644 accel/qtest/qtest-cpus.h rename accel/{ => qtest}/qtest.c (86%) create mode 100644 accel/tcg/tcg-cpus.c create mode 100644 accel/tcg/tcg-cpus.h create mode 100644 stubs/cpu-synchronize-state.c create mode 100644 target/i386/hax-cpus.c create mode 100644 target/i386/hax-cpus.h create mode 100644 target/i386/hvf/hvf-cpus.c create mode 100644 target/i386/hvf/hvf-cpus.h create mode 100644 target/i386/whpx-cpus.c create mode 100644 target/i386/whpx-cpus.h