mbox series

[0/8] Add RISC-V semihosting 0.2. Finish ARM semihosting 2.0

Message ID 20201125213617.2496935-1-keithp@keithp.com (mailing list archive)
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Series Add RISC-V semihosting 0.2. Finish ARM semihosting 2.0 | expand

Message

Keith Packard Nov. 25, 2020, 9:36 p.m. UTC
This series adds support for RISC-V Semihosting, version 0.2 as
specified here:

	https://github.com/riscv/riscv-semihosting-spec/releases/tag/0.2

This specification references the ARM semihosting release 2.0 as specified here:

	https://static.docs.arm.com/100863/0200/semihosting.pdf

That specification includes several semihosting calls which were not
previously implemented. This series includes implementations for the
remaining calls so that both RISC-V and ARM versions are now complete.

Tests for release 2.0 can be found in picolibc on the semihost-2.0-all
branch:

	https://github.com/picolibc/picolibc/tree/semihost-2.0-all

These tests uncovered a bug in the SYS_HEAPINFO implementation for
ARM, which has been fixed in this series as well.

The series is structured as follows:

 1. Move shared semihosting files
 2. Change public common semihosting APIs
 3. Change internal semihosting interfaces
 4. Fix SYS_HEAPINFO crash on ARM
 5. Add RISC-V semihosting implementation
 6-8. Add missing semihosting operations from release 2.0

Signed-off-by: Keith Packard <keithp@keithp.com>

Comments

Alex Bennée Dec. 14, 2020, 11:24 a.m. UTC | #1
Keith Packard <keithp@keithp.com> writes:

> This series adds support for RISC-V Semihosting, version 0.2 as
> specified here:
>
> 	https://github.com/riscv/riscv-semihosting-spec/releases/tag/0.2
>
> This specification references the ARM semihosting release 2.0 as specified here:
>
> 	https://static.docs.arm.com/100863/0200/semihosting.pdf
>
> That specification includes several semihosting calls which were not
> previously implemented. This series includes implementations for the
> remaining calls so that both RISC-V and ARM versions are now complete.
>
> Tests for release 2.0 can be found in picolibc on the semihost-2.0-all
> branch:
>
> 	https://github.com/picolibc/picolibc/tree/semihost-2.0-all
>
> These tests uncovered a bug in the SYS_HEAPINFO implementation for
> ARM, which has been fixed in this series as well.
>
> The series is structured as follows:
>
>  1. Move shared semihosting files
>  2. Change public common semihosting APIs
>  3. Change internal semihosting interfaces
>  4. Fix SYS_HEAPINFO crash on ARM
>  5. Add RISC-V semihosting implementation
>  6-8. Add missing semihosting operations from release 2.0
>
> Signed-off-by: Keith Packard <keithp@keithp.com>

Queued to semihosting/next, thanks.
Alex Bennée Dec. 14, 2020, 2:58 p.m. UTC | #2
Alex Bennée <alex.bennee@linaro.org> writes:

> Keith Packard <keithp@keithp.com> writes:
>
>> This series adds support for RISC-V Semihosting, version 0.2 as
>> specified here:
>>
>> 	https://github.com/riscv/riscv-semihosting-spec/releases/tag/0.2
>>
>> This specification references the ARM semihosting release 2.0 as specified here:
>>
>> 	https://static.docs.arm.com/100863/0200/semihosting.pdf
>>
>> That specification includes several semihosting calls which were not
>> previously implemented. This series includes implementations for the
>> remaining calls so that both RISC-V and ARM versions are now complete.
>>
>> Tests for release 2.0 can be found in picolibc on the semihost-2.0-all
>> branch:
>>
>> 	https://github.com/picolibc/picolibc/tree/semihost-2.0-all
>>
>> These tests uncovered a bug in the SYS_HEAPINFO implementation for
>> ARM, which has been fixed in this series as well.
>>
>> The series is structured as follows:
>>
>>  1. Move shared semihosting files
>>  2. Change public common semihosting APIs
>>  3. Change internal semihosting interfaces
>>  4. Fix SYS_HEAPINFO crash on ARM
>>  5. Add RISC-V semihosting implementation
>>  6-8. Add missing semihosting operations from release 2.0
>>
>> Signed-off-by: Keith Packard <keithp@keithp.com>
>
> Queued to semihosting/next, thanks.

Hmm scratch that... it fails in a number of linux-user only builds with:

  /usr/bin/ld: libqemu-aarch64_be-linux-user.fa.p/linux-user_aarch64_cpu_loop.c.o: in function `cpu_loop':
  /builds/stsquad/qemu/build/../linux-user/aarch64/cpu_loop.c:133: undefined reference to `do_common_semihosting'
  collect2: error: ld returned 1 exit status
  [651/2871] Compiling C object libqemu-alpha-linux-user.fa.p/target_alpha_translate.c.o
  ninja: build stopped: subcommand failed.

As well as a chunk of the various cross builds, see:

  https://gitlab.com/stsquad/qemu/-/pipelines/229443833/failures

On the next re-spin could you include Kito Cheng's patch for linux-user
support and also drop the version numbering from the commit titles so I
don't have to file them off again.

Thanks,
Keith Packard Dec. 14, 2020, 8:06 p.m. UTC | #3
Alex Bennée <alex.bennee@linaro.org> writes:

> Hmm scratch that... it fails in a number of linux-user only builds with:
>
>   /usr/bin/ld: libqemu-aarch64_be-linux-user.fa.p/linux-user_aarch64_cpu_loop.c.o: in function `cpu_loop':
>   /builds/stsquad/qemu/build/../linux-user/aarch64/cpu_loop.c:133: undefined reference to `do_common_semihosting'
>   collect2: error: ld returned 1 exit status
>   [651/2871] Compiling C object libqemu-alpha-linux-user.fa.p/target_alpha_translate.c.o
>   ninja: build stopped: subcommand failed.

I missed changing default-configs/targets/aarch64_be-linux-user.mak.

>   https://gitlab.com/stsquad/qemu/-/pipelines/229443833/failures

Some of these were caused by a missing explicit cast to Int128, which is
needed on hosts without compiler support for 128-bit ints. The rest
app to have been the same problem with aarch64_be-linux-user.

> On the next re-spin could you include Kito Cheng's patch for linux-user
> support and also drop the version numbering from the commit titles so I
> don't have to file them off again.

Yup, all done. Thanks much for the review and for getting these tests
run. I've rebased on current master and fixed the problems identified
above.