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Fri, 08 Jan 2021 11:10:02 -0800 (PST) Date: Fri, 8 Jan 2021 11:09:39 -0800 Message-Id: <20210108190945.949196-1-wuhaotsh@google.com> Mime-Version: 1.0 X-Mailer: git-send-email 2.29.2.729.g45daf8777d-goog Subject: [PATCH v5 0/6] Additional NPCM7xx devices To: peter.maydell@linaro.org Received-SPF: pass client-ip=2607:f8b0:4864:20::749; envelope-from=3Cq74XwgKCk8DByr5A9yx55x2v.t537v3B-uvCv2454x4B.58x@flex--wuhaotsh.bounces.google.com; helo=mail-qk1-x749.google.com X-Spam_score_int: -99 X-Spam_score: -10.0 X-Spam_bar: ---------- X-Spam_report: (-10.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.386, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: minyard@acm.org, venture@google.com, qemu-devel@nongnu.org, hskinnemoen@google.com, wuhaotsh@google.com, kfting@nuvoton.com, qemu-arm@nongnu.org, Avi.Fishman@nuvoton.com, f4bug@amsat.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Reply-to: Hao Wu X-Patchwork-Original-From: Hao Wu via From: Hao Wu This patch series include a few more NPCM7XX devices including - Analog Digital Converter (ADC) - Pulse Width Modulation (PWM) We also modified the CLK module to generate clock values using qdev_clock. These clocks are used to determine various clocks in NPCM7XX devices. Thank you for your review. Changes since v4: - Use clock_ticks_to_ns to compute clock time in nanoseconds. (Didn't apply to PWM patch since it requires a frequency as output.) - Removed reset_timer and resets immediately in ADC patch. - Removed "qemu/osdep.h" from headers and include them in .c files. - Use REG32 for register fields. - Fix a g_assert that a guest can trigger with incorrect input. Changes since v3: - Use type casting instead of accessing parent object in all devices. Changes since v2: - Split PWM test into a separate patch in the patch set - Add trace events for PWM's update_freq/update_duty - Add trace events for ioread/iowrite in ADC and PWM - Use timer_get_ns in hw/timer/npcm7xx_timer.c - Update commit message in ADC/PWM to mention qom-get/set method for usage - Fix typos Changes since v1: - We removed the IPMI and KCS related code from this patch set. Hao Wu (6): hw/misc: Add clock converter in NPCM7XX CLK module hw/timer: Refactor NPCM7XX Timer to use CLK clock hw/adc: Add an ADC module for NPCM7XX hw/misc: Add a PWM module for NPCM7XX hw/misc: Add QTest for NPCM7XX PWM Module hw/*: Use type casting for SysBusDevice in NPCM7XX docs/system/arm/nuvoton.rst | 4 +- hw/adc/meson.build | 1 + hw/adc/npcm7xx_adc.c | 301 ++++++++++++ hw/adc/trace-events | 5 + hw/arm/npcm7xx.c | 55 ++- hw/arm/npcm7xx_boards.c | 2 +- hw/mem/npcm7xx_mc.c | 2 +- hw/misc/meson.build | 1 + hw/misc/npcm7xx_clk.c | 797 ++++++++++++++++++++++++++++++- hw/misc/npcm7xx_gcr.c | 2 +- hw/misc/npcm7xx_pwm.c | 550 +++++++++++++++++++++ hw/misc/npcm7xx_rng.c | 2 +- hw/misc/trace-events | 6 + hw/nvram/npcm7xx_otp.c | 2 +- hw/ssi/npcm7xx_fiu.c | 2 +- hw/timer/npcm7xx_timer.c | 39 +- include/hw/adc/npcm7xx_adc.h | 69 +++ include/hw/arm/npcm7xx.h | 4 + include/hw/misc/npcm7xx_clk.h | 146 +++++- include/hw/misc/npcm7xx_pwm.h | 105 ++++ include/hw/timer/npcm7xx_timer.h | 1 + meson.build | 1 + tests/qtest/meson.build | 4 +- tests/qtest/npcm7xx_adc-test.c | 377 +++++++++++++++ tests/qtest/npcm7xx_pwm-test.c | 490 +++++++++++++++++++ 25 files changed, 2920 insertions(+), 48 deletions(-) create mode 100644 hw/adc/npcm7xx_adc.c create mode 100644 hw/adc/trace-events create mode 100644 hw/misc/npcm7xx_pwm.c create mode 100644 include/hw/adc/npcm7xx_adc.h create mode 100644 include/hw/misc/npcm7xx_pwm.h create mode 100644 tests/qtest/npcm7xx_adc-test.c create mode 100644 tests/qtest/npcm7xx_pwm-test.c