| Message ID | 20210201151629.29656-1-Jonathan.Cameron@huawei.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | hw/cxl/ + /hw/pci/: PCI DOE + CXL CDAT emulation | expand |
On Mon, 1 Feb 2021 23:16:25 +0800 Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote: > Whilst I know others are working on an implementation of at least some of > this, a desire to work on the kernel user of this required an > implementation so I threw this together in the meantime and am sending > it out on the basis that it may be of use to others. > > As it is an RFC I have been lazy on some cleanup and error handling. > Will fix that in a future version if we decide to take this forwards. In the interests of info for anyone seeing this, note there is an alternative version from Chris Browy and colleagues. https://lore.kernel.org/qemu-devel/alpine.LRH.2.23.451.2102021543190.30097@server4/ Note that it's proved useful because we disagreed on a few things some of which I believe need spec clarification. (definitely one spec misread in this version - oops). > > Based on Ben's cxl-2.0v3 branch from https://gitlab.com/bwidawsk/qemu > Possible I've picked an unstable branch so this may or may not currently > apply :) I'll rebase on Ben's next version when avaialble. > > Jonathan Cameron (4): > include/standard-headers/linux/pci_regs: temp hack to add necessary > DOE definitions. > hw/pci/pcie_doe: Introduce utility functions for PCIe DOE > hw/cxl/cxl-cdat: Initial CDAT implementation for use by CXL devices > hw/mem/cxl_type3: Enabled DOE mailbox for access to CDAT > > hw/cxl/cxl-cdat.c | 252 +++++++++++++++++++++ > hw/cxl/meson.build | 1 + > hw/mem/cxl_type3.c | 49 ++++- > hw/pci/meson.build | 2 +- > hw/pci/pcie_doe.c | 257 ++++++++++++++++++++++ > include/hw/cxl/cxl.h | 1 + > include/hw/cxl/cxl_cdat.h | 101 +++++++++ > include/hw/pci/doe.h | 40 ++++ > include/hw/pci/pci_ids.h | 2 + > include/standard-headers/linux/pci_regs.h | 33 ++- > 10 files changed, 734 insertions(+), 4 deletions(-) > create mode 100644 hw/cxl/cxl-cdat.c > create mode 100644 hw/pci/pcie_doe.c > create mode 100644 include/hw/cxl/cxl_cdat.h > create mode 100644 include/hw/pci/doe.h >
Whilst I know others are working on an implementation of at least some of this, a desire to work on the kernel user of this required an implementation so I threw this together in the meantime and am sending it out on the basis that it may be of use to others. As it is an RFC I have been lazy on some cleanup and error handling. Will fix that in a future version if we decide to take this forwards. Based on Ben's cxl-2.0v3 branch from https://gitlab.com/bwidawsk/qemu Possible I've picked an unstable branch so this may or may not currently apply :) I'll rebase on Ben's next version when avaialble. Jonathan Cameron (4): include/standard-headers/linux/pci_regs: temp hack to add necessary DOE definitions. hw/pci/pcie_doe: Introduce utility functions for PCIe DOE hw/cxl/cxl-cdat: Initial CDAT implementation for use by CXL devices hw/mem/cxl_type3: Enabled DOE mailbox for access to CDAT hw/cxl/cxl-cdat.c | 252 +++++++++++++++++++++ hw/cxl/meson.build | 1 + hw/mem/cxl_type3.c | 49 ++++- hw/pci/meson.build | 2 +- hw/pci/pcie_doe.c | 257 ++++++++++++++++++++++ include/hw/cxl/cxl.h | 1 + include/hw/cxl/cxl_cdat.h | 101 +++++++++ include/hw/pci/doe.h | 40 ++++ include/hw/pci/pci_ids.h | 2 + include/standard-headers/linux/pci_regs.h | 33 ++- 10 files changed, 734 insertions(+), 4 deletions(-) create mode 100644 hw/cxl/cxl-cdat.c create mode 100644 hw/pci/pcie_doe.c create mode 100644 include/hw/cxl/cxl_cdat.h create mode 100644 include/hw/pci/doe.h