Message ID | 20210210220426.3577804-1-wuhaotsh@google.com (mailing list archive) |
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Wed, 10 Feb 2021 14:04:38 -0800 (PST) Date: Wed, 10 Feb 2021 14:04:21 -0800 Message-Id: <20210210220426.3577804-1-wuhaotsh@google.com> Mime-Version: 1.0 X-Mailer: git-send-email 2.30.0.478.g8a0d178c01-goog Subject: [PATCH v3 0/5] hw/i2c: Add NPCM7XX SMBus Device To: peter.maydell@linaro.org Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, Avi.Fishman@nuvoton.com, kfting@nuvoton.com, wuhaotsh@google.com, hskinnemoen@google.com, venture@google.com, dje@google.com, cminyard@mvista.com Content-Type: text/plain; charset="UTF-8" Received-SPF: pass client-ip=2607:f8b0:4864:20::54a; envelope-from=3dlgkYAgKCr81zmftyxmlttlqj.htrvjrz-ij0jqstslsz.twl@flex--wuhaotsh.bounces.google.com; helo=mail-pg1-x54a.google.com X-Spam_score_int: -95 X-Spam_score: -9.6 X-Spam_bar: --------- X-Spam_report: (-9.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org> Reply-to: Hao Wu <wuhaotsh@google.com> From: Hao Wu via <qemu-devel@nongnu.org> |
Series |
hw/i2c: Add NPCM7XX SMBus Device
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On Wed, 10 Feb 2021 at 22:04, Hao Wu <wuhaotsh@google.com> wrote: > > This patch set implements the System manager bus (SMBus) module in NPCM7XX > SoC. Basically, it emulates the data transactions of the module, not the > SDA/SCL levels. We have also added a QTest which contains read and write > operations for both single-byte and FIFO mode, and added basic I2C devices > for npcm750-evb and quanta-gsj boards. Applied to target-arm.next, thanks. -- PMM