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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id i11sm1009229wro.53.2021.03.04.14.23.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Mar 2021 14:23:25 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [RFC PATCH v2 0/8] cpu: Move CPUClass::has_work() to TCGCPUOps Date: Thu, 4 Mar 2021 23:23:15 +0100 Message-Id: <20210304222323.1954755-1-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x42b.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Thomas Huth , qemu-riscv@nongnu.org, Eduardo Habkost , David Hildenbrand , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Cornelia Huck , Richard Henderson , Laurent Vivier , Greg Kurz , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Claudio Fontana , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Hi, cpu_has_work() isn't used out of TCG, so restrict it to it. RFC because maybe it could? Since v1: - finished PPC - check cc->tcg_ops->has_work non-null (thuth) Based-on: <20210227232519.222663-1-richard.henderson@linaro.org> Philippe Mathieu-Daudé (8): sysemu/tcg: Restrict tcg_exec_init() to CONFIG_TCG sysemu/tcg: Restrict qemu_tcg_mttcg_enabled() to TCG target/arm: Directly use arm_cpu_has_work instead of CPUClass::has_work target/s390x: Move s390_cpu_has_work to excp_helper.c target/ppc: Duplicate the TCGCPUOps structure for POWER CPUs cpu: Declare cpu_has_work() in 'sysemu/tcg.h' cpu: Move CPUClass::has_work() to TCGCPUOps target/arm: Restrict arm_cpu_has_work() to TCG include/hw/core/cpu.h | 27 ----------- include/hw/core/tcg-cpu-ops.h | 4 ++ include/sysemu/tcg.h | 30 +++++++++++-- target/arm/internals.h | 1 + target/s390x/internal.h | 1 + accel/tcg/cpu-exec.c | 12 +++++ hw/core/cpu.c | 6 --- softmmu/cpus.c | 1 + target/alpha/cpu.c | 2 +- target/arm/cpu.c | 6 +-- target/arm/op_helper.c | 2 +- target/avr/cpu.c | 2 +- target/cris/cpu.c | 3 +- target/hexagon/cpu.c | 2 +- target/hppa/cpu.c | 2 +- target/i386/cpu.c | 7 +-- target/i386/tcg/tcg-cpu.c | 6 +++ target/lm32/cpu.c | 2 +- target/m68k/cpu.c | 2 +- target/microblaze/cpu.c | 2 +- target/mips/cpu.c | 2 +- target/moxie/cpu.c | 2 +- target/nios2/cpu.c | 2 +- target/openrisc/cpu.c | 2 +- target/riscv/cpu.c | 2 +- target/rx/cpu.c | 2 +- target/s390x/cpu.c | 19 +------- target/s390x/excp_helper.c | 18 ++++++++ target/sh4/cpu.c | 2 +- target/sparc/cpu.c | 2 +- target/tilegx/cpu.c | 2 +- target/tricore/cpu.c | 2 +- target/unicore32/cpu.c | 2 +- target/xtensa/cpu.c | 2 +- tcg/tcg.c | 1 + target/ppc/translate_init.c.inc | 79 ++++++++++++++++++++++++++++++--- 36 files changed, 171 insertions(+), 90 deletions(-)