mbox series

[RFC,0/5] RISC-V:support Nuclei FPGA Evaluation Kit

Message ID 20210507081654.11056-1-wangjunqiang@iscas.ac.cn (mailing list archive)
Headers show
Series RISC-V:support Nuclei FPGA Evaluation Kit | expand

Message

Wang Junqiang May 7, 2021, 8:16 a.m. UTC
This patch series provides an implementation of Nuclei FPGA Machine[1].
At present, only MCU mode support is included. In mcu mode, We will
use eclic[2] as interrupt controller. It is compatible with clic
in Machine mode. But It contains some customized csr[3] that will
take up part of the csr code. If there is any question, please
let me know.

Features:
1.Add Nuclei CSR support in eclic mode
2.Add ECLIC Device
3.Add Systimer Device
4.Add Uart Device
5.Add Nuclei FPGA Machine

It have passed Nuclei SDK[4](not include dsp) and RTThread[5] HBird BSP
Test.

Any comments are welcome.Thanks

wangjunqiang

[1] https://doc.nucleisys.com/nuclei_sdk/design/board/nuclei_fpga_eval.html
[2] https://doc.nucleisys.com/nuclei_spec/isa/eclic.html
[3] https://doc.nucleisys.com/nuclei_spec/isa/core_csr.html
[4] https://github.com/Nuclei-Software/nuclei-sdk.git
[5] https://github.com/RT-Thread/rt-thread

wangjunqiang (5):
  target/riscv: Add Nuclei CSR and Update interrupt handling
  hw/intc: Add Nuclei ECLIC device
  hw/intc: Add Nuclei Systimer
  hw/char: Add Nuclei Uart
  Nuclei FPGA Evaluation Kit MCU Machine

 default-configs/devices/riscv32-softmmu.mak |   1 +
 default-configs/devices/riscv64-softmmu.mak |   1 +
 hw/char/Kconfig                             |   3 +
 hw/char/meson.build                         |   1 +
 hw/char/nuclei_uart.c                       | 208 ++++++++++
 hw/intc/Kconfig                             |   6 +
 hw/intc/meson.build                         |   2 +
 hw/intc/nuclei_eclic.c                      | 437 ++++++++++++++++++++
 hw/intc/nuclei_systimer.c                   | 254 ++++++++++++
 hw/riscv/Kconfig                            |   9 +
 hw/riscv/meson.build                        |   1 +
 hw/riscv/nuclei_n.c                         | 276 +++++++++++++
 include/hw/char/nuclei_uart.h               |  73 ++++
 include/hw/intc/nuclei_eclic.h              | 115 ++++++
 include/hw/intc/nuclei_systimer.h           |  70 ++++
 include/hw/riscv/nuclei_n.h                 | 136 ++++++
 target/riscv/cpu.c                          |  25 +-
 target/riscv/cpu.h                          |  42 +-
 target/riscv/cpu_bits.h                     |  37 ++
 target/riscv/cpu_helper.c                   |  80 +++-
 target/riscv/csr.c                          | 347 +++++++++++++++-
 target/riscv/insn_trans/trans_rvi.c.inc     |  16 +-
 target/riscv/op_helper.c                    |  14 +
 23 files changed, 2145 insertions(+), 9 deletions(-)
 create mode 100644 hw/char/nuclei_uart.c
 create mode 100644 hw/intc/nuclei_eclic.c
 create mode 100644 hw/intc/nuclei_systimer.c
 create mode 100644 hw/riscv/nuclei_n.c
 create mode 100644 include/hw/char/nuclei_uart.h
 create mode 100644 include/hw/intc/nuclei_eclic.h
 create mode 100644 include/hw/intc/nuclei_systimer.h
 create mode 100644 include/hw/riscv/nuclei_n.h

Comments

no-reply@patchew.org May 7, 2021, 1:33 p.m. UTC | #1
Patchew URL: https://patchew.org/QEMU/20210507081654.11056-1-wangjunqiang@iscas.ac.cn/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 20210507081654.11056-1-wangjunqiang@iscas.ac.cn
Subject: [RFC PATCH 0/5] RISC-V:support Nuclei FPGA Evaluation Kit

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]         patchew/20210507081654.11056-1-wangjunqiang@iscas.ac.cn -> patchew/20210507081654.11056-1-wangjunqiang@iscas.ac.cn
Switched to a new branch 'test'
cdf3a5a Nuclei FPGA Evaluation Kit MCU Machine
fc461db hw/char: Add Nuclei Uart
749f98b hw/intc: Add Nuclei Systimer
4f82151 hw/intc: Add Nuclei ECLIC device
f0b7d59 target/riscv: Add Nuclei CSR and Update interrupt handling

=== OUTPUT BEGIN ===
1/5 Checking commit f0b7d59bd81c (target/riscv: Add Nuclei CSR and Update interrupt handling)
WARNING: line over 80 characters
#519: FILE: target/riscv/csr.c:720:
+static int rmw_mscratchcsw(CPURISCVState *env, int csrno, target_ulong *ret_value,

ERROR: space required after that close brace '}'
#527: FILE: target/riscv/csr.c:728:
+    }else {

WARNING: line over 80 characters
#783: FILE: target/riscv/csr.c:1742:
+    [CSR_MINTSTATUS] = {"mintstatus", eclic,  read_mintstatus,  write_mintstatus  },

ERROR: line over 90 characters
#784: FILE: target/riscv/csr.c:1743:
+    [CSR_MSCRATCHCSW] =  {"mscratchcsw", any,  read_mscratchcsw, write_mscratchcsw, rmw_mscratchcsw},

ERROR: line over 90 characters
#785: FILE: target/riscv/csr.c:1744:
+    [CSR_MSCRATCHCSWL] =  { "mscratchcswl", any,  read_mscratchcswl, write_mscratchcswl,  rmw_mscratchcswl},

WARNING: line over 80 characters
#789: FILE: target/riscv/csr.c:1748:
+    [CSR_MMISC_CTL] =  { "mmisc_ctl", any,  read_mmisc_ctl,   write_mmisc_ctl   },

WARNING: line over 80 characters
#790: FILE: target/riscv/csr.c:1749:
+    [CSR_MSAVESTATUS] =  { "msavestatus", any,  read_msavestatus, write_msavestatus },

WARNING: line over 80 characters
#791: FILE: target/riscv/csr.c:1750:
+    [CSR_MSAVEEPC1] = { "msaveepc1", any,  read_msaveepc1,   write_msaveepc1   },

WARNING: line over 80 characters
#792: FILE: target/riscv/csr.c:1751:
+    [CSR_MSAVECAUSE1] =  { "msavecause1", any,  read_msavecause1, write_msavecause1 },

WARNING: line over 80 characters
#793: FILE: target/riscv/csr.c:1752:
+    [CSR_MSAVEEPC2] =  { "msaveepc2", any,  read_msaveepc2,   write_msaveepc2   },

WARNING: line over 80 characters
#794: FILE: target/riscv/csr.c:1753:
+    [CSR_MSAVECAUSE2] =  { "msavecause2", any,  read_msavecause2, write_msavecause2 },

WARNING: line over 80 characters
#795: FILE: target/riscv/csr.c:1754:
+    [CSR_MSAVEDCAUSE1] =  { "msavedcause1", any,  read_msavedcause1, write_msavedcause1 },

WARNING: line over 80 characters
#796: FILE: target/riscv/csr.c:1755:
+    [CSR_MSAVEDCAUSE2] =  { "msavedcause2", any,  read_msavedcause2, write_msavedcause2 },

WARNING: line over 80 characters
#805: FILE: target/riscv/csr.c:1764:
+    [CSR_MUCOUNTEREN] = { "mucounteren", any,  read_mucounteren, write_mucounteren },

ERROR: Missing Signed-off-by: line(s)

total: 4 errors, 11 warnings, 784 lines checked

Patch 1/5 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

2/5 Checking commit 4f82151c82e4 (hw/intc: Add Nuclei ECLIC device)
ERROR: line over 90 characters
#152: FILE: hw/intc/nuclei_eclic.c:103:
+                                          (active->irq & 0xFFF) | (shv << 12) | (active->level << 13));

ERROR: line over 90 characters
#178: FILE: hw/intc/nuclei_eclic.c:129:
+                                             (eclic->clicintctl[irq] >> (8 - level_width)) &

WARNING: line over 80 characters
#220: FILE: hw/intc/nuclei_eclic.c:171:
+static void nuclei_eclic_update_intip(NucLeiECLICState *eclic, int irq, int new_intip)

ERROR: Missing Signed-off-by: line(s)

total: 3 errors, 1 warnings, 565 lines checked

Patch 2/5 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/5 Checking commit 749f98b9b790 (hw/intc: Add Nuclei Systimer)
Use of uninitialized value $acpi_testexpected in string eq at ./scripts/checkpatch.pl line 1529.
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#47: 
new file mode 100644

total: 0 errors, 1 warnings, 337 lines checked

Patch 3/5 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
4/5 Checking commit fc461db1fe2c (hw/char: Add Nuclei Uart)
Use of uninitialized value $acpi_testexpected in string eq at ./scripts/checkpatch.pl line 1529.
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#43: 
new file mode 100644

total: 0 errors, 1 warnings, 294 lines checked

Patch 4/5 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
5/5 Checking commit cdf3a5a645a4 (Nuclei FPGA Evaluation Kit MCU Machine)
Use of uninitialized value $acpi_testexpected in string eq at ./scripts/checkpatch.pl line 1529.
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#74: 
new file mode 100644

total: 0 errors, 1 warnings, 438 lines checked

Patch 5/5 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20210507081654.11056-1-wangjunqiang@iscas.ac.cn/testing.checkpatch/?type=message.
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