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Tue, 01 Jun 2021 21:46:55 +0000 Received: from b03ledav004.gho.boulder.ibm.com (b03ledav004.gho.boulder.ibm.com [9.17.130.235]) by b03cxnp07029.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 151Lks8Y24838412 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 1 Jun 2021 21:46:54 GMT Received: from b03ledav004.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3449F78067; Tue, 1 Jun 2021 21:46:54 +0000 (GMT) Received: from b03ledav004.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id EF51078064; Tue, 1 Jun 2021 21:46:52 +0000 (GMT) Received: from farosas.linux.ibm.com.com (unknown [9.211.142.192]) by b03ledav004.gho.boulder.ibm.com (Postfix) with ESMTP; Tue, 1 Jun 2021 21:46:52 +0000 (GMT) From: Fabiano Rosas To: qemu-devel@nongnu.org Subject: [RFC PATCH 0/5] target/ppc: powerpc_excp improvements - part I Date: Tue, 1 Jun 2021 18:46:44 -0300 Message-Id: <20210601214649.785647-1-farosas@linux.ibm.com> X-Mailer: git-send-email 2.29.2 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: pc1LLbapJRo16q_rNlFOdZuQa-6HRSo- X-Proofpoint-ORIG-GUID: pc1LLbapJRo16q_rNlFOdZuQa-6HRSo- X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-06-01_10:2021-06-01, 2021-06-01 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxscore=0 lowpriorityscore=0 clxscore=1015 priorityscore=1501 spamscore=0 malwarescore=0 suspectscore=0 impostorscore=0 mlxlogscore=564 bulkscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104190000 definitions=main-2106010143 Received-SPF: pass client-ip=148.163.156.1; envelope-from=farosas@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, groug@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This is my attempt at reducing the size of powerpc_excp and cleaning it up a bit. It has two parts: part I (this series) tackles the big switch statement that runs the interrupt emulation code. Each interrupt now gets its own callback function that is kept within QOM. The per-processor code still registers the interrupts in a similar manner to what is done today and powerpc_excp replaces its switch statement for a function call. part II (still WIP: https://github.com/farosas/qemu/commits/powerpc_excp) tries to make powerpc_excp processor agnostic by removing the excp_model checks and moving processor-specific interrupt properties to per-processor QOM classes. I think it would be nice if we could at the end have separate interrupts and interrupt model implementations. That way we could start moving things into well defined per-processor files, CONFIGs, etc. (So far tested on x86 emulating P9 and compile-only 32-bit and linux-user. I still need to gather some command lines for the older cpus.) Based-on: eb22196316ee653178ae517de83b490ad3636b91 # ppc-for-6.1 Fabiano Rosas (5): target/ppc: powerpc_excp: Move lpes code to where it is used target/ppc: powerpc_excp: Remove dump_syscall_vectored target/ppc: powerpc_excp: Consolidade TLB miss code target/ppc: powerpc_excp: Standardize arguments to interrupt code target/ppc: powerpc_excp: Move interrupt raising code to QOM target/ppc/cpu.h | 29 +- target/ppc/cpu_init.c | 640 +++++++++++++++++++------------------ target/ppc/excp_helper.c | 670 +++++---------------------------------- target/ppc/interrupts.c | 638 +++++++++++++++++++++++++++++++++++++ target/ppc/machine.c | 2 +- target/ppc/meson.build | 1 + target/ppc/ppc_intr.h | 55 ++++ target/ppc/translate.c | 3 +- 8 files changed, 1117 insertions(+), 921 deletions(-) create mode 100644 target/ppc/interrupts.c create mode 100644 target/ppc/ppc_intr.h --- 2.29.2