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[v7,0/8] hw/arm/virt: Introduce cpu topology support

Message ID 20211007030746.10420-1-wangyanan55@huawei.com (mailing list archive)
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Series hw/arm/virt: Introduce cpu topology support | expand

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Yanan Wang Oct. 7, 2021, 3:07 a.m. UTC 
Hi,

This is a new version rebased on top of master (commit ca61fa4b80).
Since both the SMP parsing improvement patchset and the ACPI refactoring
patchset have been merged into master, now it's a proper time to respin
this series which had some dependency on them. Thanks for reviewing.

Description of this series:
Once the view of an accurate virtual cpu topology is provided to guest,
with a well-designed vCPU pinning to the pCPU we may get a huge benefit,
e.g., the scheduling performance improvement. See Dario Faggioli's
research and the related performance tests in [1] for reference.

This patch series introduces cpu topology support for Arm platform.
Both cpu-map in DT and ACPI PPTT table are introduced to store the
topology information. And we only describe the topology information
to 6.2 and newer virt machines, considering compatibility.

[1] https://kvmforum2020.sched.com/event/eE1y/virtual-topology-for-virtual-machines
-friend-or-foe-dario-faggioli-suse

Series tested locally on Arm64 machines kunpeng920.
After booting a Linux guest with "-smp 16,sockets=4,cores=4,threads=1,maxcpus=16",
through lscpu we will see the information about CPU topology like:
Architecture:        aarch64
Byte Order:          Little Endian
CPU(s):              16
On-line CPU(s) list: 0-15
Thread(s) per core:  1
Core(s) per socket:  4
Socket(s):           4
NUMA node(s):        1
Vendor ID:           0x48
Model:               0
Stepping:            0x1
BogoMIPS:            200.00
NUMA node0 CPU(s):   0-15

and with "-smp 16" we will see:
Architecture:        aarch64
Byte Order:          Little Endian
CPU(s):              16
On-line CPU(s) list: 0-15
Thread(s) per core:  1
Core(s) per socket:  16
Socket(s):           1
NUMA node(s):        1
Vendor ID:           0x48
Model:               0
Stepping:            0x1
BogoMIPS:            200.00
NUMA node0 CPU(s):   0-15

Changelog:

v6->v7:
- rebased on top of master (commit ca61fa4b80)
- use newly introduced acpi_table_begin/acpi_table_end APIs to build PPTT
  (patch #5 updated)
- add reference files for PPTT to fix broken bios-table-test for Aarch64
  virt machine (patch #6-#8 added)
- v6: https://lore.kernel.org/qemu-devel/20210824122016.144364-1-wangyanan55@huawei.com/

Andrew Jones (2):
  hw/arm/virt: Add cpu-map to device tree
  hw/acpi/aml-build: Add PPTT table

Yanan Wang (6):
  hw/arm/virt: Only describe cpu topology since virt-6.2
  device_tree: Add qemu_fdt_add_path
  hw/acpi/aml-build: Add Processor hierarchy node structure
  tests/data/acpi/virt: Add empty binary files for PPTT
  hw/arm/virt-acpi-build: Generate PPTT table
  tests/data/acpi/virt: Update binary files for PPTT

 hw/acpi/aml-build.c               |  86 ++++++++++++++++++++++++++++++
 hw/arm/virt-acpi-build.c          |   8 ++-
 hw/arm/virt.c                     |  71 ++++++++++++++++++++----
 include/hw/acpi/aml-build.h       |   7 +++
 include/hw/arm/virt.h             |   4 +-
 include/sysemu/device_tree.h      |   1 +
 softmmu/device_tree.c             |  44 ++++++++++++++-
 tests/data/acpi/virt/PPTT         | Bin 0 -> 76 bytes
 tests/data/acpi/virt/PPTT.memhp   | Bin 0 -> 76 bytes
 tests/data/acpi/virt/PPTT.numamem | Bin 0 -> 76 bytes
 tests/data/acpi/virt/PPTT.pxb     | Bin 0 -> 76 bytes
 11 files changed, 207 insertions(+), 14 deletions(-)
 create mode 100644 tests/data/acpi/virt/PPTT
 create mode 100644 tests/data/acpi/virt/PPTT.memhp
 create mode 100644 tests/data/acpi/virt/PPTT.numamem
 create mode 100644 tests/data/acpi/virt/PPTT.pxb

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