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[v4,0/7] support subsets of scalar crypto extension

Message ID 20220111035124.9468-1-liweiwei@iscas.ac.cn (mailing list archive)
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Series support subsets of scalar crypto extension | expand

Message

Weiwei Li Jan. 11, 2022, 3:51 a.m. UTC
This patchset implements RISC-V scalar crypto extension v1.0.0 version instructions. 
Partial instructions are reused from B-extension.

Specification:
https://github.com/riscv/riscv-crypto

The port is available here:
https://github.com/plctlab/plct-qemu/tree/plct-k-upstream-v4

To test rvk implementation,  specify cpu argument with 'zks=true,zkn=true'  
or 
"zbkb=true,zbkc=true,zbkx=true,zknd=true,zkne=true,zknh=true,zksed=true,zksh=true,zkr=true"
 to enable  K-extension support.  This implementation can pass the ACT tests 
for K with our extended act support for qemu (available at 
https://github.com/plctlab/plct-qemu/tree/plct-k-upstream-v4-with-act)

v4:
* drop "x-" in exposed properties
* delete unrelated changes

v3:
* add extension check for SEED csr access

v2:
* optimize implementation for brev8, xperm, zip, unzip
* use aes related sbox array from crypto/aes.h
* move sm4_sbox to crypto/sm4.c, and share it with target/arm

Weiwei Li (7):
  target/riscv: rvk: add cfg properties for zbk* and zk*
  target/riscv: rvk: add implementation of instructions for Zbk*
  crypto include/crypto target/arm: move sm4_sbox to crypto
  target/riscv: rvk: add implementation of instructions for Zk*
  target/riscv: rvk: add CSR support for Zkr
  disas/riscv.c: rvk: add disas support for Zbk* and Zk* instructions
  target/riscv: rvk: expose zbk* and zk* properties

 crypto/meson.build                      |   1 +
 crypto/sm4.c                            |  49 +++
 disas/riscv.c                           | 170 +++++++++
 include/crypto/sm4.h                    |   6 +
 target/arm/crypto_helper.c              |  36 +-
 target/riscv/bitmanip_helper.c          |  74 ++++
 target/riscv/cpu.c                      |  37 ++
 target/riscv/cpu.h                      |  13 +
 target/riscv/cpu_bits.h                 |   9 +
 target/riscv/crypto_helper.c            | 446 ++++++++++++++++++++++
 target/riscv/csr.c                      |  74 ++++
 target/riscv/helper.h                   |  42 +++
 target/riscv/insn32.decode              |  94 ++++-
 target/riscv/insn_trans/trans_rvb.c.inc | 127 ++++++-
 target/riscv/insn_trans/trans_rvk.c.inc | 467 ++++++++++++++++++++++++
 target/riscv/meson.build                |   3 +-
 target/riscv/pmp.h                      |   8 +-
 target/riscv/translate.c                |   8 +
 18 files changed, 1594 insertions(+), 70 deletions(-)
 create mode 100644 crypto/sm4.c
 create mode 100644 include/crypto/sm4.h
 create mode 100644 target/riscv/crypto_helper.c
 create mode 100644 target/riscv/insn_trans/trans_rvk.c.inc

Comments

Alistair Francis Jan. 18, 2022, 4:41 a.m. UTC | #1
On Tue, Jan 11, 2022 at 1:54 PM Weiwei Li <liweiwei@iscas.ac.cn> wrote:
>
> This patchset implements RISC-V scalar crypto extension v1.0.0 version instructions.
> Partial instructions are reused from B-extension.
>
> Specification:
> https://github.com/riscv/riscv-crypto
>
> The port is available here:
> https://github.com/plctlab/plct-qemu/tree/plct-k-upstream-v4
>
> To test rvk implementation,  specify cpu argument with 'zks=true,zkn=true'
> or
> "zbkb=true,zbkc=true,zbkx=true,zknd=true,zkne=true,zknh=true,zksed=true,zksh=true,zkr=true"
>  to enable  K-extension support.  This implementation can pass the ACT tests
> for K with our extended act support for qemu (available at
> https://github.com/plctlab/plct-qemu/tree/plct-k-upstream-v4-with-act)
>
> v4:
> * drop "x-" in exposed properties
> * delete unrelated changes
>
> v3:
> * add extension check for SEED csr access
>
> v2:
> * optimize implementation for brev8, xperm, zip, unzip
> * use aes related sbox array from crypto/aes.h
> * move sm4_sbox to crypto/sm4.c, and share it with target/arm
>
> Weiwei Li (7):
>   target/riscv: rvk: add cfg properties for zbk* and zk*
>   target/riscv: rvk: add implementation of instructions for Zbk*
>   crypto include/crypto target/arm: move sm4_sbox to crypto
>   target/riscv: rvk: add implementation of instructions for Zk*
>   target/riscv: rvk: add CSR support for Zkr
>   disas/riscv.c: rvk: add disas support for Zbk* and Zk* instructions
>   target/riscv: rvk: expose zbk* and zk* properties

Thanks for the patches!

Overall this looks good, just some small comments on the individual patches.

For the next version do you mind splitting the patches up a little bit
more? That will make it easier and faster to review

Alistair

>
>  crypto/meson.build                      |   1 +
>  crypto/sm4.c                            |  49 +++
>  disas/riscv.c                           | 170 +++++++++
>  include/crypto/sm4.h                    |   6 +
>  target/arm/crypto_helper.c              |  36 +-
>  target/riscv/bitmanip_helper.c          |  74 ++++
>  target/riscv/cpu.c                      |  37 ++
>  target/riscv/cpu.h                      |  13 +
>  target/riscv/cpu_bits.h                 |   9 +
>  target/riscv/crypto_helper.c            | 446 ++++++++++++++++++++++
>  target/riscv/csr.c                      |  74 ++++
>  target/riscv/helper.h                   |  42 +++
>  target/riscv/insn32.decode              |  94 ++++-
>  target/riscv/insn_trans/trans_rvb.c.inc | 127 ++++++-
>  target/riscv/insn_trans/trans_rvk.c.inc | 467 ++++++++++++++++++++++++
>  target/riscv/meson.build                |   3 +-
>  target/riscv/pmp.h                      |   8 +-
>  target/riscv/translate.c                |   8 +
>  18 files changed, 1594 insertions(+), 70 deletions(-)
>  create mode 100644 crypto/sm4.c
>  create mode 100644 include/crypto/sm4.h
>  create mode 100644 target/riscv/crypto_helper.c
>  create mode 100644 target/riscv/insn_trans/trans_rvk.c.inc
>
> --
> 2.17.1
>
>
Weiwei Li Jan. 18, 2022, 8:24 a.m. UTC | #2
在 2022/1/18 下午12:41, Alistair Francis 写道:
> On Tue, Jan 11, 2022 at 1:54 PM Weiwei Li <liweiwei@iscas.ac.cn> wrote:
>> This patchset implements RISC-V scalar crypto extension v1.0.0 version instructions.
>> Partial instructions are reused from B-extension.
>>
>> Specification:
>> https://github.com/riscv/riscv-crypto
>>
>> The port is available here:
>> https://github.com/plctlab/plct-qemu/tree/plct-k-upstream-v4
>>
>> To test rvk implementation,  specify cpu argument with 'zks=true,zkn=true'
>> or
>> "zbkb=true,zbkc=true,zbkx=true,zknd=true,zkne=true,zknh=true,zksed=true,zksh=true,zkr=true"
>>   to enable  K-extension support.  This implementation can pass the ACT tests
>> for K with our extended act support for qemu (available at
>> https://github.com/plctlab/plct-qemu/tree/plct-k-upstream-v4-with-act)
>>
>> v4:
>> * drop "x-" in exposed properties
>> * delete unrelated changes
>>
>> v3:
>> * add extension check for SEED csr access
>>
>> v2:
>> * optimize implementation for brev8, xperm, zip, unzip
>> * use aes related sbox array from crypto/aes.h
>> * move sm4_sbox to crypto/sm4.c, and share it with target/arm
>>
>> Weiwei Li (7):
>>    target/riscv: rvk: add cfg properties for zbk* and zk*
>>    target/riscv: rvk: add implementation of instructions for Zbk*
>>    crypto include/crypto target/arm: move sm4_sbox to crypto
>>    target/riscv: rvk: add implementation of instructions for Zk*
>>    target/riscv: rvk: add CSR support for Zkr
>>    disas/riscv.c: rvk: add disas support for Zbk* and Zk* instructions
>>    target/riscv: rvk: expose zbk* and zk* properties
> Thanks for the patches!
>
> Overall this looks good, just some small comments on the individual patches.
>
> For the next version do you mind splitting the patches up a little bit
> more? That will make it easier and faster to review
>
> Alistair
>
Thanks for your comments. Sorry for the big patches. I'll divide them.

Regards,

Weiwei Li

>>   crypto/meson.build                      |   1 +
>>   crypto/sm4.c                            |  49 +++
>>   disas/riscv.c                           | 170 +++++++++
>>   include/crypto/sm4.h                    |   6 +
>>   target/arm/crypto_helper.c              |  36 +-
>>   target/riscv/bitmanip_helper.c          |  74 ++++
>>   target/riscv/cpu.c                      |  37 ++
>>   target/riscv/cpu.h                      |  13 +
>>   target/riscv/cpu_bits.h                 |   9 +
>>   target/riscv/crypto_helper.c            | 446 ++++++++++++++++++++++
>>   target/riscv/csr.c                      |  74 ++++
>>   target/riscv/helper.h                   |  42 +++
>>   target/riscv/insn32.decode              |  94 ++++-
>>   target/riscv/insn_trans/trans_rvb.c.inc | 127 ++++++-
>>   target/riscv/insn_trans/trans_rvk.c.inc | 467 ++++++++++++++++++++++++
>>   target/riscv/meson.build                |   3 +-
>>   target/riscv/pmp.h                      |   8 +-
>>   target/riscv/translate.c                |   8 +
>>   18 files changed, 1594 insertions(+), 70 deletions(-)
>>   create mode 100644 crypto/sm4.c
>>   create mode 100644 include/crypto/sm4.h
>>   create mode 100644 target/riscv/crypto_helper.c
>>   create mode 100644 target/riscv/insn_trans/trans_rvk.c.inc
>>
>> --
>> 2.17.1
>>
>>