Message ID | 20220321091453.17113-1-jamin_lin@aspeedtech.com (mailing list archive) |
---|---|
Headers | show |
Series | hw/gpio Add ASPEED GPIO model for AST1030 | expand |
The 03/21/2022 10:55, Cédric Le Goater wrote: > Hello Jamin, > > On 3/21/22 10:14, Jamin Lin wrote: > > 1. Add GPIO read/write trace event. > > 2. Support GPIO index mode for write operation. > > It did not support GPIO index mode for read operation. > > 3. AST1030 integrates one set of Parallel GPIO Controller > > Is the AST1030 a new SoC you are developing ? We don't have a machine > for it in QEMU. We should introduce the models first if the changes > are specific to this SoC. > > Thanks, > > C. > > I submitted a new patch series for AST1030 model support. So far, only GPIO driver for AST1030 used "index mode" for write operation. Thanks-Jamin > > with maximum 151 control pins, which are 21 groups > > (A~U, exclude pin: M6 M7 Q5 Q6 Q7 R0 R1 R4 R5 R6 R7 S0 S3 S4 > > S5 S6 S7 ) and the group T and U are input only. > > > > Test Steps: > > 1. Download image from > > https://github.com/AspeedTech-BMC/zephyr/releases/download/v00.01.04/ast1030-evb-demo.zip > > 2. Extract the zip file to obtain zephyr.elf > > 3. Run ./qemu-system-arm -M ast1030-evb -kernel $PATH/zephyr.elf -nographic > > 4. Test GPIO D6 Pin > > uart:~$ gpio conf GPIO0_A_D 30 out > > uart:~$ gpio get GPIO0_A_D 30 > > [Result] > > Reading GPIO0_A_D pin 30 > > Value 0 > > uart:~$ gpio set GPIO0_A_D 30 1 > > uart:~$ gpio get GPIO0_A_D 30 > > [Result] > > Reading GPIO0_A_D pin 30 > > Value 1 > > uart:~$ gpio set GPIO0_A_D 30 0 > > uart:~$ gpio get GPIO0_A_D 30 > > [Result] > > Reading GPIO0_A_D pin 30 > > Value 0 > > > > Jamin Lin (1): > > hw/gpio: Add ASPEED GPIO model for AST1030 > > > > hw/gpio/aspeed_gpio.c | 250 ++++++++++++++++++++++++++++++++-- > > hw/gpio/trace-events | 5 + > > include/hw/gpio/aspeed_gpio.h | 16 ++- > > 3 files changed, 255 insertions(+), 16 deletions(-) > > >