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[0/2] hw/nvme: support smart AEN

Message ID 20220507072644.263105-1-pizhenwei@bytedance.com (mailing list archive)
Headers show
Series hw/nvme: support smart AEN | expand

Message

zhenwei pi May 7, 2022, 7:26 a.m. UTC
Hi,
In this series, firstly introduce smart related bits of aen cfg, then
support this in oaes.

Linux guest does not support this currently, I also send a series to
enable smart AEN:
https://lore.kernel.org/lkml/20220507065026.260306-1-pizhenwei@bytedance.com/T/#t

Test the two series together, works fine.

Zhenwei Pi (2):
  hw/nvme: introduce smart bits of aen cfg
  hw/nvme: support smart AEN

 hw/nvme/ctrl.c       | 9 ++++++++-
 include/block/nvme.h | 8 +++++++-
 2 files changed, 15 insertions(+), 2 deletions(-)

Comments

Klaus Jensen May 9, 2022, 11:12 a.m. UTC | #1
On May  7 15:26, zhenwei pi wrote:
> Hi,
> In this series, firstly introduce smart related bits of aen cfg, then
> support this in oaes.
> 
> Linux guest does not support this currently, I also send a series to
> enable smart AEN:
> https://lore.kernel.org/lkml/20220507065026.260306-1-pizhenwei@bytedance.com/T/#t
> 
> Test the two series together, works fine.
> 
> Zhenwei Pi (2):
>   hw/nvme: introduce smart bits of aen cfg
>   hw/nvme: support smart AEN
> 
>  hw/nvme/ctrl.c       | 9 ++++++++-
>  include/block/nvme.h | 8 +++++++-
>  2 files changed, 15 insertions(+), 2 deletions(-)
> 

I'm not quite sure what you are trying to achieve here. Bits 0 through 7
are reserved in OAES, they are not optional.

We already simply accept whatever the host configured with the
Asynchronous Event Configuration feature. And you added the support for
triggering custom AENs for those through the monitor.
zhenwei pi May 9, 2022, 12:36 p.m. UTC | #2
On 5/9/22 19:12, Klaus Jensen wrote:
> On May  7 15:26, zhenwei pi wrote:
>> Hi,
>> In this series, firstly introduce smart related bits of aen cfg, then
>> support this in oaes.
>>
>> Linux guest does not support this currently, I also send a series to
>> enable smart AEN:
>> https://lore.kernel.org/lkml/20220507065026.260306-1-pizhenwei@bytedance.com/T/#t
>>
>> Test the two series together, works fine.
>>
>> Zhenwei Pi (2):
>>    hw/nvme: introduce smart bits of aen cfg
>>    hw/nvme: support smart AEN
>>
>>   hw/nvme/ctrl.c       | 9 ++++++++-
>>   include/block/nvme.h | 8 +++++++-
>>   2 files changed, 15 insertions(+), 2 deletions(-)
>>
> 
> I'm not quite sure what you are trying to achieve here. Bits 0 through 7
> are reserved in OAES, they are not optional.
> 
> We already simply accept whatever the host configured with the
> Asynchronous Event Configuration feature. And you added the support for
> triggering custom AENs for those through the monitor.

Oh, sorry, I misunderstand OAES[7:0]. Thanks for pointing this out!