[0/3] MIPS system emulation miscellaneous fixes

Message

Jiaxun Yang Oct. 29, 2022, 2 a.m. UTC

Hi all,

I was trying to build a MIPS VirtIO board[1] for QEMU that is able
to work with all processors we support.

When I was bring up varoius CPUs on that board I noticed some issues
with the system emulation code that I'm fixing in this series.

Thanks.

- Jiaxun
[1]: https://gitlab.com/FlyGoat/qemu/-/tree/mips-virt

Jiaxun Yang (3):
  target/mips: Set CP0St_{KX, SX, UX} for Loongson-2F
  target/mips: Cast offset field of Octeon BBIT to int16_t
  target/mips: Disable DSP ASE for Octeon68XX

 target/mips/cpu-defs.c.inc         | 4 ++--
 target/mips/cpu.c                  | 6 ++++++
 target/mips/tcg/octeon_translate.c | 2 +-
 3 files changed, 9 insertions(+), 3 deletions(-)