mbox series

[v2,0/3] MIPS system emulation miscellaneous fixes

Message ID 20221031132531.18122-1-jiaxun.yang@flygoat.com (mailing list archive)
Headers show
Series MIPS system emulation miscellaneous fixes | expand

Message

Jiaxun Yang Oct. 31, 2022, 1:25 p.m. UTC 
Hi all,

I was trying to build a MIPS VirtIO board[1] for QEMU that is able
to work with all processors we support.

When I was bring up varoius CPUs on that board I noticed some issues
with the system emulation code that I'm fixing in this series.

Thanks.

- Jiaxun
[1]: https://gitlab.com/FlyGoat/qemu/-/tree/mips-virt

v2: Address review comments

Jiaxun Yang (3):
  target/mips: Set CP0St_{KX, SX, UX} for Loongson-2F
  target/mips: Cast offset field of Octeon BBIT to int16_t
  target/mips: Disable DSP ASE for Octeon68XX

 target/mips/cpu-defs.c.inc    | 4 ++--
 target/mips/cpu.c             | 6 ++++++
 target/mips/tcg/octeon.decode | 2 +-
 3 files changed, 9 insertions(+), 3 deletions(-)

Comments

Philippe Mathieu-Daudé Nov. 7, 2022, 11:21 p.m. UTC | #1 
On 31/10/22 14:25, Jiaxun Yang wrote:
> Hi all,
> 
> I was trying to build a MIPS VirtIO board[1] for QEMU that is able
> to work with all processors we support.
> 
> When I was bring up varoius CPUs on that board I noticed some issues
> with the system emulation code that I'm fixing in this series.
> 
> Thanks.
> 
> - Jiaxun
> [1]: https://gitlab.com/FlyGoat/qemu/-/tree/mips-virt
> 
> v2: Address review comments
> 
> Jiaxun Yang (3):
>    target/mips: Set CP0St_{KX, SX, UX} for Loongson-2F
>    target/mips: Cast offset field of Octeon BBIT to int16_t
>    target/mips: Disable DSP ASE for Octeon68XX

Queued to mips-fixes, thanks.