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[RFC,v2,00/19] target/arm: Allow CONFIG_TCG=n builds

Message ID 20230109224232.11661-1-farosas@suse.de (mailing list archive)
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Series target/arm: Allow CONFIG_TCG=n builds | expand

Message

Fabiano Rosas Jan. 9, 2023, 10:42 p.m. UTC
This series makes the necessary changes to allow the use of
--disable-tcg for arm.

For the v2 I have taken a more strict approach to avoid introducing
changes in behavior, specially regarding the cpregs hash table.

changes:

patch 5:
  Move all cpregs related code from helper.c into cpregs.c;

patches 6 & 7:
  These are ARMCPRegInfo and accessors that are currently in helper
  files. I moved them into cpregs.c, otherwise we can't move the
  helpers into tcg/

patch 11:
  Richard suggested we handle the tcg_enable check in a header, but I
  noticed that are many more instances of arm_rebuild_hflags being
  called from code that is tcg-only, so I'm not sure if we want to
  have the added overhead in all calls. I have extracted all of the
  new tcg_enable() calls so we can judge if it's worth it.

dropped the previous patch 11:
  [RFC PATCH 11/27] target/arm: only perform TCG cpu and machine inits if TCG enabled

  This patch had a mistake when we moved
  register_cp_regs_for_features() under tcg_enabled(). That caused the
  cp_regs hash table to be empty and no registers being written in
  write_cpustate_to_list().

v1:
https://lore.kernel.org/r/20230104215835.24692-1-farosas@suse.de

I have included the other two already reviewed series to facilitate
the merge. Patch 12 is the first from this series proper.

I could use some help with the last two patches which deal with the
fact that ptw.c needs CPUTLBEntryFull and probe_access_full which are
_currently_ only compiled with CONFIG_TCG=y.

The 3 cpregs patches were split from the larger commit[1] from the
original series. We're still left with one huge patch, but it is only
code movement, it can be checked with:

diff -u <(sed -n 's/^-//p' patch) <(sed -n 's/^\+//p' patch)

1- [RFC v14 14/80] target/arm: split cpregs from tcg/helper.c
   https://lore.kernel.org/r/20210416162824.25131-15-cfontana@suse.de

Claudio Fontana (8):
  target/arm: rename handle_semihosting to tcg_handle_semihosting
  target/arm: wrap psci call with tcg_enabled
  target/arm: wrap call to aarch64_sve_change_el in tcg_enabled()
  target/arm: move helpers to tcg/
  target/arm: Move psci.c into the tcg directory
  tests: do not run test-hmp on all machines for ARM KVM-only
  tests: do not run qom-test on all machines for ARM KVM-only
  tests: device-introspect-test: cope with ARM TCG-only devices

Fabiano Rosas (11):
  target/arm: Move PC alignment check
  target/arm: Move cpregs code into cpregs.c
  target/arm: Move define_debug_regs() to cpregs.c
  target/arm: Move helper_set_pstate_* into cpregs.c
  target/arm: move translate modules to tcg/
  target/arm: Wrap arm_rebuild_hflags calls with tcg_enabled
  target/arm: Move hflags code into the tcg directory
  tests/tcg: Do not build/run TCG tests if TCG is disabled
  target/arm: Move regime_using_lpae_format into internal.h
  cpu-defs.h: Expose CPUTLBEntryFull to non-TCG code
  target/arm: don't access TCG code when debugging with KVM

 MAINTAINERS                             |    1 +
 configure                               |    4 +
 hw/arm/boot.c                           |    6 +-
 hw/intc/armv7m_nvic.c                   |   20 +-
 include/exec/cpu-defs.h                 |    6 +
 target/arm/arm-powerctl.c               |    7 +-
 target/arm/cpregs.c                     | 9505 +++++++++++++++++++++++
 target/arm/cpu.c                        |   10 +-
 target/arm/helper.c                     | 9459 +---------------------
 target/arm/internals.h                  |   32 +-
 target/arm/machine.c                    |   31 +-
 target/arm/meson.build                  |   48 +-
 target/arm/ptw.c                        |    4 +
 target/arm/tcg-stubs.c                  |   33 +
 target/arm/{ => tcg}/a32-uncond.decode  |    0
 target/arm/{ => tcg}/a32.decode         |    0
 target/arm/{ => tcg}/crypto_helper.c    |    0
 target/arm/{ => tcg}/debug_helper.c     |  367 -
 target/arm/{ => tcg}/helper-a64.c       |    0
 target/arm/tcg/hflags.c                 |  370 +
 target/arm/{ => tcg}/iwmmxt_helper.c    |    0
 target/arm/{ => tcg}/m-nocp.decode      |    0
 target/arm/{ => tcg}/m_helper.c         |    0
 target/arm/tcg/meson.build              |   51 +
 target/arm/{ => tcg}/mte_helper.c       |    0
 target/arm/{ => tcg}/mve.decode         |    0
 target/arm/{ => tcg}/mve_helper.c       |    0
 target/arm/{ => tcg}/neon-dp.decode     |    0
 target/arm/{ => tcg}/neon-ls.decode     |    0
 target/arm/{ => tcg}/neon-shared.decode |    0
 target/arm/{ => tcg}/neon_helper.c      |    0
 target/arm/{ => tcg}/op_helper.c        |    1 +
 target/arm/{ => tcg}/pauth_helper.c     |    0
 target/arm/{ => tcg}/psci.c             |    0
 target/arm/{ => tcg}/sme-fa64.decode    |    0
 target/arm/{ => tcg}/sme.decode         |    0
 target/arm/{ => tcg}/sme_helper.c       |   29 -
 target/arm/{ => tcg}/sve.decode         |    0
 target/arm/{ => tcg}/sve_helper.c       |    0
 target/arm/{ => tcg}/t16.decode         |    0
 target/arm/{ => tcg}/t32.decode         |    0
 target/arm/{ => tcg}/tlb_helper.c       |   18 -
 target/arm/{ => tcg}/translate-a64.c    |    1 +
 target/arm/{ => tcg}/translate-a64.h    |    0
 target/arm/{ => tcg}/translate-m-nocp.c |    0
 target/arm/{ => tcg}/translate-mve.c    |    0
 target/arm/{ => tcg}/translate-neon.c   |    0
 target/arm/{ => tcg}/translate-sme.c    |    0
 target/arm/{ => tcg}/translate-sve.c    |    0
 target/arm/{ => tcg}/translate-vfp.c    |    0
 target/arm/{ => tcg}/translate.c        |    1 +
 target/arm/{ => tcg}/translate.h        |    0
 target/arm/{ => tcg}/vec_helper.c       |    0
 target/arm/{ => tcg}/vec_internal.h     |    0
 target/arm/{ => tcg}/vfp-uncond.decode  |    0
 target/arm/{ => tcg}/vfp.decode         |    0
 target/arm/trace-events                 |    2 +-
 tests/Makefile.include                  |   10 +
 tests/qtest/device-introspect-test.c    |   32 +-
 tests/qtest/qom-test.c                  |   21 +
 tests/qtest/test-hmp.c                  |   21 +
 61 files changed, 10154 insertions(+), 9936 deletions(-)
 create mode 100644 target/arm/cpregs.c
 create mode 100644 target/arm/tcg-stubs.c
 rename target/arm/{ => tcg}/a32-uncond.decode (100%)
 rename target/arm/{ => tcg}/a32.decode (100%)
 rename target/arm/{ => tcg}/crypto_helper.c (100%)
 rename target/arm/{ => tcg}/debug_helper.c (63%)
 rename target/arm/{ => tcg}/helper-a64.c (100%)
 create mode 100644 target/arm/tcg/hflags.c
 rename target/arm/{ => tcg}/iwmmxt_helper.c (100%)
 rename target/arm/{ => tcg}/m-nocp.decode (100%)
 rename target/arm/{ => tcg}/m_helper.c (100%)
 create mode 100644 target/arm/tcg/meson.build
 rename target/arm/{ => tcg}/mte_helper.c (100%)
 rename target/arm/{ => tcg}/mve.decode (100%)
 rename target/arm/{ => tcg}/mve_helper.c (100%)
 rename target/arm/{ => tcg}/neon-dp.decode (100%)
 rename target/arm/{ => tcg}/neon-ls.decode (100%)
 rename target/arm/{ => tcg}/neon-shared.decode (100%)
 rename target/arm/{ => tcg}/neon_helper.c (100%)
 rename target/arm/{ => tcg}/op_helper.c (99%)
 rename target/arm/{ => tcg}/pauth_helper.c (100%)
 rename target/arm/{ => tcg}/psci.c (100%)
 rename target/arm/{ => tcg}/sme-fa64.decode (100%)
 rename target/arm/{ => tcg}/sme.decode (100%)
 rename target/arm/{ => tcg}/sme_helper.c (98%)
 rename target/arm/{ => tcg}/sve.decode (100%)
 rename target/arm/{ => tcg}/sve_helper.c (100%)
 rename target/arm/{ => tcg}/t16.decode (100%)
 rename target/arm/{ => tcg}/t32.decode (100%)
 rename target/arm/{ => tcg}/tlb_helper.c (94%)
 rename target/arm/{ => tcg}/translate-a64.c (99%)
 rename target/arm/{ => tcg}/translate-a64.h (100%)
 rename target/arm/{ => tcg}/translate-m-nocp.c (100%)
 rename target/arm/{ => tcg}/translate-mve.c (100%)
 rename target/arm/{ => tcg}/translate-neon.c (100%)
 rename target/arm/{ => tcg}/translate-sme.c (100%)
 rename target/arm/{ => tcg}/translate-sve.c (100%)
 rename target/arm/{ => tcg}/translate-vfp.c (100%)
 rename target/arm/{ => tcg}/translate.c (99%)
 rename target/arm/{ => tcg}/translate.h (100%)
 rename target/arm/{ => tcg}/vec_helper.c (100%)
 rename target/arm/{ => tcg}/vec_internal.h (100%)
 rename target/arm/{ => tcg}/vfp-uncond.decode (100%)
 rename target/arm/{ => tcg}/vfp.decode (100%)

Comments

Richard Henderson Jan. 10, 2023, 5:37 a.m. UTC | #1
On 1/9/23 14:42, Fabiano Rosas wrote:
>   target/arm/cpu.c           |    1 +
>   target/arm/machine.c       |    1 +
>   target/arm/meson.build     |    1 +
>   target/arm/op_helper.c     |    1 +
>   target/arm/translate-a64.c |    1 +
>   target/arm/translate.c     |    1 +

These additions of #include "cpregs.h" are unrelated to the code movement.

Otherwise,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~