mbox series

[RFC,v3,00/28] target/arm: Allow CONFIG_TCG=n builds

Message ID 20230113140419.4013-1-farosas@suse.de (mailing list archive)
Headers show
Series target/arm: Allow CONFIG_TCG=n builds | expand

Message

Fabiano Rosas Jan. 13, 2023, 2:03 p.m. UTC 
This series makes the necessary changes to allow the use of
--disable-tcg for arm.

Based on Richard's "target/arm: Introduce aarch64_set_svcr":
https://lore.kernel.org/r/20230112004322.161330-1-richard.henderson@linaro.org

branch here: https://github.com/farosas/qemu/tree/arm-disable-tcg

Since v2:

patch 5: removed extraneous include statements
patch 6: removed extraneous tcg_enabled
patch 7: dropped in favor of "target/arm: Introduce aarch64_set_svcr"
patch 12: removed inline
patch 13-15: dropped, not needed due to Kconfig changes

new:

- cpregs.h changes I had forgotten to include in v2
- moved CPUs initialization into tcg/
- skipped tests that require TCG
- fixed the migration tests for aarch64
- Kconfig changes, left only the 'virt' machine set by default with KVM

NOTE: current master shows errors in make check when using
--without-default-devices. This series does not touch the implicitly
added devices, only the ones in devices.mak, so this shouldn't affect
it. I'll take a look at the errors on master in the meantime.

v2:
https://lore.kernel.org/r/20230109224232.11661-1-farosas@suse.de

v1:
https://lore.kernel.org/r/20230104215835.24692-1-farosas@suse.de

Claudio Fontana (6):
  target/arm: rename handle_semihosting to tcg_handle_semihosting
  target/arm: wrap psci call with tcg_enabled
  target/arm: wrap call to aarch64_sve_change_el in tcg_enabled()
  target/arm: move helpers to tcg/
  target/arm: Move psci.c into the tcg directory
  target/arm: move cpu_tcg to tcg/cpu32.c

Fabiano Rosas (22):
  target/arm: Move PC alignment check
  target/arm: Move cpregs code out of cpu.h
  target/arm: Move cpregs code into cpregs.c
  target/arm: Move define_debug_regs() to cpregs.c
  target/arm: Wrap breakpoint/watchpoint updates with tcg_enabled
  target/arm: move translate modules to tcg/
  target/arm: Wrap arm_rebuild_hflags calls with tcg_enabled
  target/arm: Move hflags code into the tcg directory
  target/arm: Move regime_using_lpae_format into internal.h
  target/arm: Don't access TCG code when debugging with KVM
  cpu-defs.h: Expose CPUTLBEntryFull to non-TCG code
  target/arm: Move cortex sysregs into cpregs.c
  target/arm: Move common cpu code into cpu.c
  target/arm: Set cortex-a57 as default cpu for KVM-only build
  tests/qtest: Skip tests that depend on TCG when CONFIG_TCG=n
  tests/qtest: Restrict bcm2835-dma-test to CONFIG_RASPI
  tests/tcg: Do not build/run TCG tests if TCG is disabled
  tests/avocado: Skip tests that require a missing accelerator
  tests/avocado: Tag TCG tests with accel:tcg
  target/avocado: Pass parameters to migration test on aarch64
  arm/Kconfig: Always select SEMIHOSTING when TCG is present
  arm/Kconfig: Do not build TCG-only boards on a KVM-only build

 MAINTAINERS                                 |    1 +
 configs/devices/aarch64-softmmu/default.mak |    4 -
 configs/devices/arm-softmmu/default.mak     |   38 -
 configure                                   |    4 +
 hw/arm/Kconfig                              |   40 +-
 hw/arm/boot.c                               |    6 +-
 hw/arm/virt.c                               |    6 +
 hw/intc/armv7m_nvic.c                       |   20 +-
 include/exec/cpu-defs.h                     |    6 +
 target/arm/Kconfig                          |    7 +
 target/arm/arm-powerctl.c                   |    7 +-
 target/arm/cpregs.c                         | 9530 +++++++++++++++++++
 target/arm/cpregs.h                         |  104 +
 target/arm/cpu.c                            |   85 +-
 target/arm/cpu.h                            |   91 -
 target/arm/cpu64.c                          |    1 +
 target/arm/helper.c                         | 9457 +-----------------
 target/arm/internals.h                      |   38 +-
 target/arm/machine.c                        |   30 +-
 target/arm/meson.build                      |   49 +-
 target/arm/ptw.c                            |    4 +
 target/arm/tcg-stubs.c                      |   27 +
 target/arm/{ => tcg}/a32-uncond.decode      |    0
 target/arm/{ => tcg}/a32.decode             |    0
 target/arm/{cpu_tcg.c => tcg/cpu32.c}       |  149 +-
 target/arm/{ => tcg}/crypto_helper.c        |    0
 target/arm/{ => tcg}/debug_helper.c         |  367 -
 target/arm/{ => tcg}/helper-a64.c           |    0
 target/arm/tcg/hflags.c                     |  370 +
 target/arm/{ => tcg}/iwmmxt_helper.c        |    0
 target/arm/{ => tcg}/m-nocp.decode          |    0
 target/arm/{ => tcg}/m_helper.c             |    0
 target/arm/tcg/meson.build                  |   52 +
 target/arm/{ => tcg}/mte_helper.c           |    0
 target/arm/{ => tcg}/mve.decode             |    0
 target/arm/{ => tcg}/mve_helper.c           |    0
 target/arm/{ => tcg}/neon-dp.decode         |    0
 target/arm/{ => tcg}/neon-ls.decode         |    0
 target/arm/{ => tcg}/neon-shared.decode     |    0
 target/arm/{ => tcg}/neon_helper.c          |    0
 target/arm/{ => tcg}/op_helper.c            |    0
 target/arm/{ => tcg}/pauth_helper.c         |    0
 target/arm/{ => tcg}/psci.c                 |    0
 target/arm/{ => tcg}/sme-fa64.decode        |    0
 target/arm/{ => tcg}/sme.decode             |    0
 target/arm/{ => tcg}/sme_helper.c           |    0
 target/arm/{ => tcg}/sve.decode             |    0
 target/arm/{ => tcg}/sve_helper.c           |    0
 target/arm/{ => tcg}/t16.decode             |    0
 target/arm/{ => tcg}/t32.decode             |    0
 target/arm/{ => tcg}/tlb_helper.c           |   18 -
 target/arm/{ => tcg}/translate-a64.c        |    0
 target/arm/{ => tcg}/translate-a64.h        |    0
 target/arm/{ => tcg}/translate-m-nocp.c     |    0
 target/arm/{ => tcg}/translate-mve.c        |    0
 target/arm/{ => tcg}/translate-neon.c       |    0
 target/arm/{ => tcg}/translate-sme.c        |    0
 target/arm/{ => tcg}/translate-sve.c        |    0
 target/arm/{ => tcg}/translate-vfp.c        |    0
 target/arm/{ => tcg}/translate.c            |    0
 target/arm/{ => tcg}/translate.h            |    0
 target/arm/{ => tcg}/vec_helper.c           |    0
 target/arm/{ => tcg}/vec_internal.h         |    0
 target/arm/{ => tcg}/vfp-uncond.decode      |    0
 target/arm/{ => tcg}/vfp.decode             |    0
 target/arm/trace-events                     |    2 +-
 tests/Makefile.include                      |   10 +
 tests/avocado/avocado_qemu/__init__.py      |    4 +
 tests/avocado/boot_linux_console.py         |    1 +
 tests/avocado/migration.py                  |   11 +-
 tests/avocado/reverse_debugging.py          |    8 +
 tests/qtest/arm-cpu-features.c              |   27 +-
 tests/qtest/meson.build                     |    4 +-
 73 files changed, 10388 insertions(+), 10190 deletions(-)
 create mode 100644 target/arm/cpregs.c
 create mode 100644 target/arm/tcg-stubs.c
 rename target/arm/{ => tcg}/a32-uncond.decode (100%)
 rename target/arm/{ => tcg}/a32.decode (100%)
 rename target/arm/{cpu_tcg.c => tcg/cpu32.c} (86%)
 rename target/arm/{ => tcg}/crypto_helper.c (100%)
 rename target/arm/{ => tcg}/debug_helper.c (63%)
 rename target/arm/{ => tcg}/helper-a64.c (100%)
 create mode 100644 target/arm/tcg/hflags.c
 rename target/arm/{ => tcg}/iwmmxt_helper.c (100%)
 rename target/arm/{ => tcg}/m-nocp.decode (100%)
 rename target/arm/{ => tcg}/m_helper.c (100%)
 create mode 100644 target/arm/tcg/meson.build
 rename target/arm/{ => tcg}/mte_helper.c (100%)
 rename target/arm/{ => tcg}/mve.decode (100%)
 rename target/arm/{ => tcg}/mve_helper.c (100%)
 rename target/arm/{ => tcg}/neon-dp.decode (100%)
 rename target/arm/{ => tcg}/neon-ls.decode (100%)
 rename target/arm/{ => tcg}/neon-shared.decode (100%)
 rename target/arm/{ => tcg}/neon_helper.c (100%)
 rename target/arm/{ => tcg}/op_helper.c (100%)
 rename target/arm/{ => tcg}/pauth_helper.c (100%)
 rename target/arm/{ => tcg}/psci.c (100%)
 rename target/arm/{ => tcg}/sme-fa64.decode (100%)
 rename target/arm/{ => tcg}/sme.decode (100%)
 rename target/arm/{ => tcg}/sme_helper.c (100%)
 rename target/arm/{ => tcg}/sve.decode (100%)
 rename target/arm/{ => tcg}/sve_helper.c (100%)
 rename target/arm/{ => tcg}/t16.decode (100%)
 rename target/arm/{ => tcg}/t32.decode (100%)
 rename target/arm/{ => tcg}/tlb_helper.c (94%)
 rename target/arm/{ => tcg}/translate-a64.c (100%)
 rename target/arm/{ => tcg}/translate-a64.h (100%)
 rename target/arm/{ => tcg}/translate-m-nocp.c (100%)
 rename target/arm/{ => tcg}/translate-mve.c (100%)
 rename target/arm/{ => tcg}/translate-neon.c (100%)
 rename target/arm/{ => tcg}/translate-sme.c (100%)
 rename target/arm/{ => tcg}/translate-sve.c (100%)
 rename target/arm/{ => tcg}/translate-vfp.c (100%)
 rename target/arm/{ => tcg}/translate.c (100%)
 rename target/arm/{ => tcg}/translate.h (100%)
 rename target/arm/{ => tcg}/vec_helper.c (100%)
 rename target/arm/{ => tcg}/vec_internal.h (100%)
 rename target/arm/{ => tcg}/vfp-uncond.decode (100%)
 rename target/arm/{ => tcg}/vfp.decode (100%)

Comments

Philippe Mathieu-Daudé Jan. 17, 2023, 4:16 p.m. UTC | #1 
On 13/1/23 15:03, Fabiano Rosas wrote:
> Code moved verbatim.
> 
> Signed-off-by: Fabiano Rosas <farosas@suse.de>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/arm/cpregs.c     | 9087 +++++++++++++++++++++++++++++++++++++++
>   target/arm/helper.c     | 9063 --------------------------------------

Nice diffstat...

>   target/arm/meson.build  |    1 +
>   target/arm/trace-events |    2 +-
>   4 files changed, 9089 insertions(+), 9064 deletions(-)
>   create mode 100644 target/arm/cpregs.c

> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index aa94db9917..0c3e72a266 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -31,5614 +31,9 @@

Can we remove the '#include "trace.h"' from helper.c?

Otherwise:
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>

>   #endif
>   #include "cpregs.h"
>   
> -#define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */
>   
>   static void switch_mode(CPUARMState *env, int mode);


> diff --git a/target/arm/trace-events b/target/arm/trace-events
> index 2a0ba7bffc..04a480443e 100644
> --- a/target/arm/trace-events
> +++ b/target/arm/trace-events
> @@ -1,6 +1,6 @@
>   # See docs/devel/tracing.rst for syntax documentation.
>   
> -# helper.c
> +# cpregs.c
>   arm_gt_recalc(int timer, int irqstate, uint64_t nexttick) "gt recalc: timer %d irqstate %d next tick 0x%" PRIx64
>   arm_gt_recalc_disabled(int timer) "gt recalc: timer %d irqstate 0 timer disabled"
>   arm_gt_cval_write(int timer, uint64_t value) "gt_cval_write: timer %d value 0x%" PRIx64
Philippe Mathieu-Daudé Jan. 18, 2023, 10:47 a.m. UTC | #2 
On 13/1/23 15:03, Fabiano Rosas wrote:
> This series makes the necessary changes to allow the use of
> --disable-tcg for arm.
> 
> Based on Richard's "target/arm: Introduce aarch64_set_svcr":
> https://lore.kernel.org/r/20230112004322.161330-1-richard.henderson@linaro.org
> 
> branch here: https://github.com/farosas/qemu/tree/arm-disable-tcg
> 
> Since v2:
> 
> patch 5: removed extraneous include statements
> patch 6: removed extraneous tcg_enabled
> patch 7: dropped in favor of "target/arm: Introduce aarch64_set_svcr"
> patch 12: removed inline
> patch 13-15: dropped, not needed due to Kconfig changes
> 
> new:
> 
> - cpregs.h changes I had forgotten to include in v2
> - moved CPUs initialization into tcg/
> - skipped tests that require TCG
> - fixed the migration tests for aarch64
> - Kconfig changes, left only the 'virt' machine set by default with KVM

For v4, consider splitting it in two parts, first reviewed patches that
Peter can queue directly, and second part requiring more review.