mbox series

[v4,00/10] make write_misa a no-op and FEATURE_* cleanups

Message ID 20230216130444.795997-1-dbarboza@ventanamicro.com (mailing list archive)
Headers show
Series make write_misa a no-op and FEATURE_* cleanups | expand

Message

Daniel Henrique Barboza Feb. 16, 2023, 1:04 p.m. UTC
Hi,

In this version we're changing our minds w.r.t write_misa() and we're
now officializing it as a regular no-op. This was proposed as a better
alternative than trying to fix all the potential problems the code has
in the v3 review [1].

If we decide later on that there's a worthwhile use case to support,
where write_misa() needs to be (re-)implemented, we can use git to see
the code that has been removed and use it.

Changes from v3:
- patches without acks: 1 and 2
- patch 1:
  - reformulated: turn write_misa() into a proper no-op
- patch 2:
  - remove RISCV_FEATURE_MISA
v3 link: https://lists.gnu.org/archive/html/qemu-devel/2023-02/msg04326.html

[1] https://lists.gnu.org/archive/html/qemu-devel/2023-02/msg04326.html

Daniel Henrique Barboza (10):
  target/riscv: turn write_misa() into an official no-op
  target/riscv: remove RISCV_FEATURE_MISA
  target/riscv: introduce riscv_cpu_cfg()
  target/riscv: remove RISCV_FEATURE_DEBUG
  target/riscv/cpu.c: error out if EPMP is enabled without PMP
  target/riscv: remove RISCV_FEATURE_EPMP
  target/riscv: remove RISCV_FEATURE_PMP
  hw/riscv/virt.c: do not use RISCV_FEATURE_MMU in
    create_fdt_socket_cpus()
  target/riscv: remove RISCV_FEATURE_MMU
  target/riscv/cpu: remove CPUArchState::features and friends

 hw/riscv/virt.c           |  7 +++--
 target/riscv/cpu.c        | 19 +++---------
 target/riscv/cpu.h        | 28 +++--------------
 target/riscv/cpu_helper.c |  6 ++--
 target/riscv/csr.c        | 65 +++------------------------------------
 target/riscv/machine.c    | 11 +++----
 target/riscv/monitor.c    |  2 +-
 target/riscv/op_helper.c  |  2 +-
 target/riscv/pmp.c        |  8 ++---
 9 files changed, 31 insertions(+), 117 deletions(-)