mbox series

[v6,0/9] make write_misa a no-op and FEATURE_* cleanups

Message ID 20230216215550.1011637-1-dbarboza@ventanamicro.com (mailing list archive)
Headers show
Series make write_misa a no-op and FEATURE_* cleanups | expand

Message

Daniel Henrique Barboza Feb. 16, 2023, 9:55 p.m. UTC
Hi,

This version contains a change in patch 2, where riscv_cpu_cfg() now
returns a const pointer to the RISCVCPUConfig struct instead of the
struct itself.

Minor changes were made in the remaining patches due to that.


Changes from v5:
- patches without review/acks: patch 2
- patch 2:
  - riscv_cpu_cfg() now returns a const pointer to RISCVCPUConfig
- v5 link: https://lists.gnu.org/archive/html/qemu-devel/2023-02/msg04906.html

Daniel Henrique Barboza (9):
  target/riscv: turn write_misa() into an official no-op
  target/riscv: introduce riscv_cpu_cfg()
  target/riscv: remove RISCV_FEATURE_DEBUG
  target/riscv/cpu.c: error out if EPMP is enabled without PMP
  target/riscv: remove RISCV_FEATURE_EPMP
  target/riscv: remove RISCV_FEATURE_PMP
  hw/riscv/virt.c: do not use RISCV_FEATURE_MMU in
    create_fdt_socket_cpus()
  target/riscv: remove RISCV_FEATURE_MMU
  target/riscv/cpu: remove CPUArchState::features and friends

 hw/riscv/virt.c           |  7 +++--
 target/riscv/cpu.c        | 19 +++---------
 target/riscv/cpu.h        | 28 +++--------------
 target/riscv/cpu_helper.c |  6 ++--
 target/riscv/csr.c        | 65 +++------------------------------------
 target/riscv/machine.c    | 11 +++----
 target/riscv/monitor.c    |  2 +-
 target/riscv/op_helper.c  |  2 +-
 target/riscv/pmp.c        |  8 ++---
 9 files changed, 31 insertions(+), 117 deletions(-)