[v3,0/6] target/riscv: Fix pointer mask related support

Message

Weiwei Li April 1, 2023, 12:39 p.m. UTC

This patchset tries to fix some problem in current implementation for pointer mask, and add support for pointer mask of instruction fetch.

The port is available here:
https://github.com/plctlab/plct-qemu/tree/plct-pm-fix-v5

v2:
* drop some error patchs
* Add patch 2 and 3 to fix the new problems
* Add patch 4 and 5 to use PC-relative translation for pointer mask for instruction fetch

v3:
* use target_pc temp instead of cpu_pc to store into badaddr in patch 3
* use dest_gpr instead of tcg_temp_new() for succ_pc in patch 4
* enable CF_PCREL for system mode in seperate patch 5

v4：
* Fix wrong pc_save value for conditional jump in patch 4
* Fix tcg_cflags overwrite problem to make CF_PCREL really work in new patch 5
* Fix tb mis-matched problem in new patch 6

v5:
* use gen_get_target_pc to compute target address of auipc and successor address of jalr in patch 4.
* separate tcg related fix patches(5, 6) from this patchset

Weiwei Li (6):
  target/riscv: Fix pointer mask transformation for vector address
  target/riscv: Update cur_pmmask/base when xl changes
  target/riscv: Fix target address to update badaddr
  target/riscv: Add support for PC-relative translation
  target/riscv: Enable PC-relative translation in system mode
  target/riscv: Add pointer mask support for instruction fetch

 target/riscv/cpu.c                      | 31 +++++++----
 target/riscv/cpu.h                      |  1 +
 target/riscv/cpu_helper.c               | 20 ++++++-
 target/riscv/csr.c                      | 11 ++--
 target/riscv/insn_trans/trans_rvi.c.inc | 37 +++++++++----
 target/riscv/translate.c                | 72 ++++++++++++++++++-------
 target/riscv/vector_helper.c            |  2 +-
 7 files changed, 131 insertions(+), 43 deletions(-)

Comments

Weiwei Li April 1, 2023, 12:50 p.m. UTC | #1

On 2023/4/1 20:39, Weiwei Li wrote:
> This patchset tries to fix some problem in current implementation for pointer mask, and add support for pointer mask of instruction fetch.
>
> The port is available here:
> https://github.com/plctlab/plct-qemu/tree/plct-pm-fix-v5
>
> v2:
> * drop some error patchs
> * Add patch 2 and 3 to fix the new problems
> * Add patch 4 and 5 to use PC-relative translation for pointer mask for instruction fetch
>
> v3:
> * use target_pc temp instead of cpu_pc to store into badaddr in patch 3
> * use dest_gpr instead of tcg_temp_new() for succ_pc in patch 4
> * enable CF_PCREL for system mode in seperate patch 5
>
> v4：
> * Fix wrong pc_save value for conditional jump in patch 4
> * Fix tcg_cflags overwrite problem to make CF_PCREL really work in new patch 5
> * Fix tb mis-matched problem in new patch 6
>
> v5:
> * use gen_get_target_pc to compute target address of auipc and successor address of jalr in patch 4.
> * separate tcg related fix patches(5, 6) from this patchset
>
> Weiwei Li (6):
>    target/riscv: Fix pointer mask transformation for vector address
>    target/riscv: Update cur_pmmask/base when xl changes
>    target/riscv: Fix target address to update badaddr
>    target/riscv: Add support for PC-relative translation
>    target/riscv: Enable PC-relative translation in system mode
>    target/riscv: Add pointer mask support for instruction fetch
>
>   target/riscv/cpu.c                      | 31 +++++++----
>   target/riscv/cpu.h                      |  1 +
>   target/riscv/cpu_helper.c               | 20 ++++++-
>   target/riscv/csr.c                      | 11 ++--
>   target/riscv/insn_trans/trans_rvi.c.inc | 37 +++++++++----
>   target/riscv/translate.c                | 72 ++++++++++++++++++-------
>   target/riscv/vector_helper.c            |  2 +-
>   7 files changed, 131 insertions(+), 43 deletions(-)
>
Sorry for the wrong version number in Subject. I have re-sent it.

Regards,

Weiwei Li