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Tsirkin" CC: Fan Ni , , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= , Gregory Price , Mike Maslenkin , Dave Jiang , Subject: [PATCH v5 0/3] hw/mem: CXL Type-3 Volatile Memory Support Date: Fri, 21 Apr 2023 17:08:24 +0100 Message-ID: <20230421160827.2227-1-Jonathan.Cameron@huawei.com> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 X-Originating-IP: [10.122.247.231] X-ClientProxiedBy: lhrpeml500005.china.huawei.com (7.191.163.240) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CFilter-Loop: Reflected Received-SPF: pass client-ip=185.176.79.56; envelope-from=jonathan.cameron@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jonathan Cameron X-Patchwork-Original-From: Jonathan Cameron via From: Jonathan Cameron Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org v5: Thanks to Michael Tsirkin for review - Use memory_region_size() instead of incorrect open coding. Add a precursor patch tidying up existing uses. Depends on some of the fix series posted (mostly fuzz). [PATCH 0/2] hw/cxl: CDAT file handling fixes. [PATCH v2 0/3] hw/cxl: Fix decoder commit and uncommit handlin [PATCH 0/3] docs/cxl: Gathering of fixes for 8.0 CXL docs. Based on: Message-ID: 20230421132020.7408-1-Jonathan.Cameron@huawei.com Based on: Message-ID: 20230421135906.3515-1-Jonathan.Cameron@huawei.com Based on: Message_ID: 20230421134507.26842-1-Jonathan.Cameron@huawei.com/ Now kernel support is in place, lets catch up with the emulation of volatile memory on CXL type 3. Original cover letter with minor updates. This patches provides 2 features to the CXL Type-3 Device: 1) Volatile Memory Region Support 2) Multi-Region support (1 Volatile, 1 Persistent) Summary of Changes per-commit: 1) Whitespace updates to docs and tests 2) Refactor CDAT DSMAS Initialization for multi-region initialization Multi-Region and Volatile Memory support for CXL Type-3 Devices Test and Documentation updates The final patch in this series makes 6 major changes to the type-3 device in order to implement multi-region and volatile region support 1) The HostMemoryBackend [hostmem] has been replaced by two [hostvmem] and [hostpmem] to store volatile and persistent memory respectively 2) The single AddressSpace has been replaced by two AddressSpaces [hostvmem_as] and [hostpmem_as] to map respective memdevs. 3) Each memory region size and total region are stored separately 4) The CDAT and DVSEC memory map entries have been updated: a) if vmem is present, vmem is mapped at DPA(0) b) if pmem is present i) and vmem is present, pmem is mapped at DPA(vmem->size) ii) else, pmem is mapped at DPA(0) c) partitioning of pmem is not supported in this patch set but has been discussed and this design should suffice. 5) Read/Write functions have been updated to access AddressSpaces according to the mapping described in #4. Access to the persistent address space is calculated by (dpa-vmem_len) 6) cxl-mailbox has been updated to report the respective size of volatile and persistent memory region. Gregory Price (2): tests/qtest/cxl-test: whitespace, line ending cleanup hw/cxl: Multi-Region CXL Type-3 Devices (Volatile and Persistent) Jonathan Cameron (1): hw/mem: Use memory_region_size() in cxl_type3 docs/about/deprecated.rst | 8 + docs/system/devices/cxl.rst | 49 ++++-- hw/cxl/cxl-mailbox-utils.c | 32 ++-- hw/mem/cxl_type3.c | 300 ++++++++++++++++++++++++--------- include/hw/cxl/cxl_device.h | 11 +- tests/qtest/bios-tables-test.c | 8 +- tests/qtest/cxl-test.c | 146 +++++++++++----- 7 files changed, 407 insertions(+), 147 deletions(-)