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[77.191.17.15]) by smtp.gmail.com with ESMTPSA id e7-20020a170906844700b0094f7b713e40sm3300108ejy.126.2023.04.22.08.07.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Apr 2023 08:07:34 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: qemu-block@nongnu.org, Jiaxun Yang , BALATON Zoltan , John Snow , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Bernhard Beschow Subject: [PATCH 00/13] Clean up PCI IDE device models Date: Sat, 22 Apr 2023 17:07:15 +0200 Message-Id: <20230422150728.176512-1-shentey@gmail.com> X-Mailer: git-send-email 2.40.0 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62d; envelope-from=shentey@gmail.com; helo=mail-ej1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This series is yet another attempt to clean up the PCI IDE models. It is mainly inspired the Mark's invaluable input from previous discussions. In particular, this series attempts to follow the "PCI IDE controller specification" closer. As a side effect, it also resolves usage of the isabus global in PIIX. Last but not least it fixes the VIA IDE controller to not depend on its south bridge which fixes a circular dependency. The series is structured as follows: The first three commits resolve a circular dependency between the VIA IDE controller and its south bridge, thereby implementing legacy PCI IDE interrupt routing which was missing so far. The next five patches factor out common code into the PCI IDE base class. The next two patches resolve usage of the isabus global in PIIX by reusing now common code from the base class. The same is then done for the SIL3112 controller. Finally, a small convenience function is introduced which should hide some implementation details in the PCI IDE base class. Testing done: * `make check` * `make check-avocado` * `qemu-system-ppc -machine pegasos2 -rtc base=localtime -device \ ati-vga,guest_hwcursor=true,romfile="" -cdrom morphos-3.17.iso -kernel morphos-3.17/boot.img` The machine booted successfully and a startup sound was hearable * `qemu-system-ppc -machine pegasos2 -rtc base=localtime -device \ ati-vga,guest_hwcursor=true,romfile="" -cdrom morphos-3.17.iso -kernel morphos-3.17/boot.img` The machine booted successfully and applications could be started. * qemu-system-x86_64 was used for hours during work Bernhard Beschow (13): hw/ide/pci: Expose legacy interrupts as GPIOs hw/ide/via: Implement ISA IRQ routing hw/isa/vt82c686: Remove via_isa_set_irq() hw/ide: Extract IDEBus assignment into bmdma_init() hw/ide: Extract pci_ide_class_init() hw/ide: Extract bmdma_init_ops() hw/ide: Extract pci_ide_{cmd,data}_le_ops initialization into base class constructor hw/ide: Rename PCIIDEState::*_bar attributes hw/ide/piix: Disuse isa_get_irq() hw/ide/piix: Reuse PCIIDEState::{cmd,data}_ops hw/ide/sii3112: Reuse PCIIDEState::{cmd,data}_ops hw/ide/sii3112: Reuse PCIIDEState::bmdma_ops hw/ide: Extract bmdma_clear_status() include/hw/ide/pci.h | 12 ++- include/hw/isa/vt82c686.h | 2 - hw/ide/cmd646.c | 59 ++------------- hw/ide/pci.c | 73 ++++++++++++++++++- hw/ide/piix.c | 88 ++++++++-------------- hw/ide/sii3112.c | 150 +++++++++++++++++++------------------- hw/ide/via.c | 64 +++------------- hw/isa/vt82c686.c | 23 ++++-- hw/ide/trace-events | 7 +- 9 files changed, 221 insertions(+), 257 deletions(-)