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[v2,00/21] Hexagon (target/hexagon) short-circuit and move to DisasContext

Message ID 20230427230012.3800327-1-tsimpson@quicinc.com (mailing list archive)
Headers show
Series Hexagon (target/hexagon) short-circuit and move to DisasContext | expand

Message

Taylor Simpson April 27, 2023, 10:59 p.m. UTC
This patch series achieves two major goals
Goal 1:  Short-circuit packet semantics
    In certain cases, we can avoid the overhead of writing to
    hex_new_value and write directly to hex_gpr.

    Here's a simple example of the TCG generated for
    0x004000b4:  0x7800c020 {       R0 = #0x1 }

    BEFORE:
     ---- 004000b4
     movi_i32 new_r0,$0x1
     mov_i32 r0,new_r0

    AFTER:
     ---- 004000b4
     movi_i32 r0,$0x1
Goal 2:  Move bookkeeping items from CPUHexagonState to DisasContext
    Suggested-by: Richard Henderson <richard.henderson@linaro.org>
    Several fields in CPUHexagonState are only used for bookkeeping
    within the translation of a packet.  With recent changes to eliminate
    the need to free TCGv variables, these make more sense to be
    transient and kept in DisasContext.


This patch series can be divided into 3 main parts
Part 1:  Patches 1-9
    Cleanup in preparation for parts 2 and 3
    The main goal is to move functionality out of generated helpers
Part 2:  Patches 10-15
    Short-circuit packet semantics
Part 3:  Patches 16-21
    Move bookkeeping items from CPUHexagonState to DisasContext


**** Changes in v2 ****
Address feedback from Richard Henderson <<richard.henderson@linaro.org>
    Cleaner implementation of gen_frame_scramble
    Add g_assert_not_reached() in gen_framecheck
    Move TCGv allocation inside gen_frame_scramble
    Change tcg_gen_brcond_tl to tcg_gen_movcond_tl
    Change static inline to G_GNUC_UNUSED
        Removed in later patch
    Change tcg_gen_not_i64 + tcg_gen_and_i64 to tcg_gen_andc_i64
    Use full constant in gen_slotval
    




Taylor Simpson (21):
  meson.build Add CONFIG_HEXAGON_IDEF_PARSER
  Hexagon (target/hexagon) Add DisasContext arg to gen_log_reg_write
  Hexagon (target/hexagon) Add overrides for loop setup instructions
  Hexagon (target/hexagon) Add overrides for allocframe/deallocframe
  Hexagon (target/hexagon) Add overrides for clr[tf]new
  Hexagon (target/hexagon) Remove log_reg_write from op_helper.[ch]
  Hexagon (target/hexagon) Eliminate uses of log_pred_write function
  Hexagon (target/hexagon) Clean up pred_written usage
  Hexagon (target/hexagon) Don't overlap dest writes with source reads
  Hexagon (target/hexagon) Mark registers as read during packet analysis
  Hexagon (target/hexagon) Short-circuit packet register writes
  Hexagon (target/hexagon) Short-circuit packet predicate writes
  Hexagon (target/hexagon) Short-circuit packet HVX writes
  Hexagon (target/hexagon) Short-circuit more HVX single instruction
    packets
  Hexagon (target/hexagon) Add overrides for disabled idef-parser insns
  Hexagon (target/hexagon) Make special new_value for USR
  Hexagon (target/hexagon) Move new_value to DisasContext
  Hexagon (target/hexagon) Move new_pred_value to DisasContext
  Hexagon (target/hexagon) Move pred_written to DisasContext
  Hexagon (target/hexagon) Move pkt_has_store_s1 to DisasContext
  Hexagon (target/hexagon) Move items to DisasContext

 meson.build                                 |   1 +
 target/hexagon/cpu.h                        |  10 +-
 target/hexagon/gen_tcg.h                    | 116 ++++++-
 target/hexagon/gen_tcg_hvx.h                |  23 ++
 target/hexagon/genptr.h                     |   6 +-
 target/hexagon/helper.h                     |   6 +-
 target/hexagon/macros.h                     |  57 ++--
 target/hexagon/op_helper.h                  |  16 +-
 target/hexagon/translate.h                  |  52 ++-
 target/hexagon/attribs_def.h.inc            |   6 +-
 target/hexagon/arch.c                       |   3 +-
 target/hexagon/cpu.c                        |   5 +-
 target/hexagon/genptr.c                     | 347 ++++++++++++++++----
 target/hexagon/idef-parser/parser-helpers.c |   4 +-
 target/hexagon/op_helper.c                  | 154 ++++++---
 target/hexagon/translate.c                  | 272 ++++++++++-----
 tests/tcg/hexagon/hvx_misc.c                |  21 ++
 tests/tcg/hexagon/read_write_overlap.c      | 136 ++++++++
 target/hexagon/README                       |   6 +-
 target/hexagon/gen_analyze_funcs.py         |  51 ++-
 target/hexagon/gen_helper_funcs.py          |   9 +-
 target/hexagon/gen_helper_protos.py         |  10 +-
 target/hexagon/gen_idef_parser_funcs.py     |   7 +
 target/hexagon/gen_tcg_funcs.py             |  21 +-
 target/hexagon/hex_common.py                |  16 +-
 tests/tcg/hexagon/Makefile.target           |   1 +
 26 files changed, 1063 insertions(+), 293 deletions(-)
 create mode 100644 tests/tcg/hexagon/read_write_overlap.c