mbox series

[0/7] Add new CPU model EmeraldRapids and GraniteRapids

Message ID 20230616032311.19137-1-tao1.su@linux.intel.com (mailing list archive)
Headers show
Series Add new CPU model EmeraldRapids and GraniteRapids | expand

Message

Tao Su June 16, 2023, 3:23 a.m. UTC 
This patch series mainly updates SapphireRapids CPU model and adds
new CPU model EmeraldRapids and GraniteRapids.

Bit 13 (ARCH_CAP_FBSDP_NO), bit 14 (ARCH_CAP_FBSDP_NO) and bit 15
(ARCH_CAP_PSDP_NO) of MSR_IA32_ARCH_CAPABILITIES are enumerated starting
from latest SapphireRapids, which are missed in current SapphireRapids
CPU model, so add a new version for SapphireRapids CPU model to expose
these bits.

Add EmeraldRapids CPU model to this series, since EmeraldRapids also
enumerates these bits. The original patch of EmeraldRapids CPU model is
in [1].

GraniteRapids is Intel's successor to EmeraldRapids, an Intel 3 process
microarchitecture for enthusiasts and servers, which adds new features
based on SapphireRapids and EmeraldRapids.

[1]
https://lore.kernel.org/qemu-devel/20230515025308.1050277-1-qian.wen@intel.com/

Lei Wang (1):
  target/i386: Add few security fix bits in ARCH_CAPABILITIES into
    SapphireRapids CPU model

Qian Wen (1):
  target/i386: Add new CPU model EmeraldRapids

Tao Su (5):
  target/i386: Add FEAT_7_1_EDX to adjust feature level
  target/i386: Add support for MCDT_NO in CPUID enumeration
  target/i386: Allow MCDT_NO if host supports
  target/i386: Add new bit definitions of MSR_IA32_ARCH_CAPABILITIES
  target/i386: Add new CPU model GraniteRapids

 target/i386/cpu.c     | 303 +++++++++++++++++++++++++++++++++++++++++-
 target/i386/cpu.h     |   8 ++
 target/i386/kvm/kvm.c |   5 +
 3 files changed, 314 insertions(+), 2 deletions(-)


base-commit: 7efd65423ab22e6f5890ca08ae40c84d6660242f

Comments

Lei Wang June 16, 2023, 4:01 a.m. UTC | #1 
On 6/16/2023 11:23, Tao Su wrote:
> This patch series mainly updates SapphireRapids CPU model and adds
> new CPU model EmeraldRapids and GraniteRapids.
> 
> Bit 13 (ARCH_CAP_FBSDP_NO), bit 14 (ARCH_CAP_FBSDP_NO) and bit 15

Bit 13 should be MSR_ARCH_CAP_SBDR_SSDP_NO, right?

> (ARCH_CAP_PSDP_NO) of MSR_IA32_ARCH_CAPABILITIES are enumerated starting
> from latest SapphireRapids, which are missed in current SapphireRapids
> CPU model, so add a new version for SapphireRapids CPU model to expose
> these bits.
> 
> Add EmeraldRapids CPU model to this series, since EmeraldRapids also
> enumerates these bits. The original patch of EmeraldRapids CPU model is
> in [1].
> 
> GraniteRapids is Intel's successor to EmeraldRapids, an Intel 3 process
> microarchitecture for enthusiasts and servers, which adds new features
> based on SapphireRapids and EmeraldRapids.
> 
> [1]
> https://lore.kernel.org/qemu-devel/20230515025308.1050277-1-qian.wen@intel.com/
> 
> Lei Wang (1):
>   target/i386: Add few security fix bits in ARCH_CAPABILITIES into
>     SapphireRapids CPU model
> 
> Qian Wen (1):
>   target/i386: Add new CPU model EmeraldRapids
> 
> Tao Su (5):
>   target/i386: Add FEAT_7_1_EDX to adjust feature level
>   target/i386: Add support for MCDT_NO in CPUID enumeration
>   target/i386: Allow MCDT_NO if host supports
>   target/i386: Add new bit definitions of MSR_IA32_ARCH_CAPABILITIES
>   target/i386: Add new CPU model GraniteRapids
> 
>  target/i386/cpu.c     | 303 +++++++++++++++++++++++++++++++++++++++++-
>  target/i386/cpu.h     |   8 ++
>  target/i386/kvm/kvm.c |   5 +
>  3 files changed, 314 insertions(+), 2 deletions(-)
> 
> 
> base-commit: 7efd65423ab22e6f5890ca08ae40c84d6660242f
Tao Su June 16, 2023, 4:22 a.m. UTC | #2 
On Fri, Jun 16, 2023 at 12:01:52PM +0800, Wang, Lei wrote:
> On 6/16/2023 11:23, Tao Su wrote:
> > This patch series mainly updates SapphireRapids CPU model and adds
> > new CPU model EmeraldRapids and GraniteRapids.
> > 
> > Bit 13 (ARCH_CAP_FBSDP_NO), bit 14 (ARCH_CAP_FBSDP_NO) and bit 15
> 
> Bit 13 should be MSR_ARCH_CAP_SBDR_SSDP_NO, right?

Yes, copied by mistake, thanks!

Tao

> 
> > (ARCH_CAP_PSDP_NO) of MSR_IA32_ARCH_CAPABILITIES are enumerated starting
> > from latest SapphireRapids, which are missed in current SapphireRapids
> > CPU model, so add a new version for SapphireRapids CPU model to expose
> > these bits.
> > 
> > Add EmeraldRapids CPU model to this series, since EmeraldRapids also
> > enumerates these bits. The original patch of EmeraldRapids CPU model is
> > in [1].
> > 
> > GraniteRapids is Intel's successor to EmeraldRapids, an Intel 3 process
> > microarchitecture for enthusiasts and servers, which adds new features
> > based on SapphireRapids and EmeraldRapids.
> > 
> > [1]
> > https://lore.kernel.org/qemu-devel/20230515025308.1050277-1-qian.wen@intel.com/
> > 
> > Lei Wang (1):
> >   target/i386: Add few security fix bits in ARCH_CAPABILITIES into
> >     SapphireRapids CPU model
> > 
> > Qian Wen (1):
> >   target/i386: Add new CPU model EmeraldRapids
> > 
> > Tao Su (5):
> >   target/i386: Add FEAT_7_1_EDX to adjust feature level
> >   target/i386: Add support for MCDT_NO in CPUID enumeration
> >   target/i386: Allow MCDT_NO if host supports
> >   target/i386: Add new bit definitions of MSR_IA32_ARCH_CAPABILITIES
> >   target/i386: Add new CPU model GraniteRapids
> > 
> >  target/i386/cpu.c     | 303 +++++++++++++++++++++++++++++++++++++++++-
> >  target/i386/cpu.h     |   8 ++
> >  target/i386/kvm/kvm.c |   5 +
> >  3 files changed, 314 insertions(+), 2 deletions(-)
> > 
> > 
> > base-commit: 7efd65423ab22e6f5890ca08ae40c84d6660242f