[v4,00/11] Add la32 & va32 mode for loongarch64-softmmu

Message

Jiajie Chen Aug. 8, 2023, 1:54 a.m. UTC

This patch series allow qemu-system-loongarch64 to emulate a LoongArch32
machine. A new CPU model is added for loongarch32. Initial GDB support
is added.

At the same time, VA32(32-bit virtual address) support is introduced for
LoongArch64.

LA32 support is tested using a small supervisor program at
https://github.com/jiegec/supervisor-la32. VA32 mode under LA64 is not
tested yet.

Changes since v3:

- Support VA32 mode for LoongArch64
- Check the current arch from CPUCFG.ARCH
- Reject la64-only instructions in la32 mode

Changes since v2:

- Fix typo in previous commit
- Fix VPPN width in TLBEHI/TLBREHI

Changes since v1:

- No longer create a separate qemu-system-loongarch32 executable, but
  allow user to run loongarch32 emulation using qemu-system-loongarch64
- Add loongarch32 cpu support for virt machine

Full changes:

Jiajie Chen (11):
  target/loongarch: Add macro to check current arch
  target/loongarch: Add new object class for loongarch32 cpus
  target/loongarch: Add GDB support for loongarch32 mode
  target/loongarch: Support LoongArch32 TLB entry
  target/loongarch: Support LoongArch32 DMW
  target/loongarch: Support LoongArch32 VPPN
  target/loongarch: Add LA32 & VA32 to DisasContext
  target/loongarch: Reject la64-only instructions in la32 mode
  target/loongarch: Truncate high 32 bits of address in VA32 mode
  target/loongarch: Sign extend results in VA32 mode
  target/loongarch: Add loongarch32 cpu la132

 configs/targets/loongarch64-softmmu.mak       |  2 +-
 gdb-xml/loongarch-base32.xml                  | 45 ++++++++++
 hw/loongarch/virt.c                           |  5 --
 target/loongarch/cpu-csr.h                    | 22 ++---
 target/loongarch/cpu.c                        | 88 ++++++++++++++++---
 target/loongarch/cpu.h                        | 33 ++++++-
 target/loongarch/gdbstub.c                    | 32 +++++--
 target/loongarch/insn_trans/trans_arith.c.inc | 34 +++----
 .../loongarch/insn_trans/trans_atomic.c.inc   | 77 ++++++++--------
 target/loongarch/insn_trans/trans_bit.c.inc   | 28 +++---
 .../loongarch/insn_trans/trans_branch.c.inc   |  9 +-
 target/loongarch/insn_trans/trans_extra.c.inc | 16 ++--
 .../loongarch/insn_trans/trans_fmemory.c.inc  |  8 ++
 target/loongarch/insn_trans/trans_fmov.c.inc  |  4 +-
 target/loongarch/insn_trans/trans_lsx.c.inc   |  6 ++
 .../loongarch/insn_trans/trans_memory.c.inc   | 78 +++++++++-------
 target/loongarch/insn_trans/trans_shift.c.inc | 14 +--
 target/loongarch/tlb_helper.c                 | 66 +++++++++++---
 target/loongarch/translate.c                  | 26 ++++++
 target/loongarch/translate.h                  | 12 +++
 20 files changed, 430 insertions(+), 175 deletions(-)
 create mode 100644 gdb-xml/loongarch-base32.xml