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[188.255.126.251]) by smtp.gmail.com with ESMTPSA id e14-20020a5d530e000000b0033668ac65ddsm7639513wrv.25.2023.12.23.20.48.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 23 Dec 2023 20:48:27 -0800 (PST) From: Alexey Baturo X-Google-Original-From: Alexey Baturo To: Cc: baturo.alexey@gmail.com, richard.henderson@linaro.org, zhiwei_liu@linux.alibaba.com, palmer@dabbelt.com, Alistair.Francis@wdc.com, sagark@eecs.berkeley.edu, kbastian@mail.uni-paderborn.de, qemu-devel@nongnu.org, qemu-riscv@nongnu.org, Alexey Baturo Subject: [PATCH v2 0/6] Pointer Masking update for Zjpm v0.8 Date: Sun, 24 Dec 2023 04:48:06 +0000 Message-Id: <20231224044812.2072140-1-me@deliversmonkey.space> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=baturo.alexey@gmail.com; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi, As per Richard's suggestion I made pmm field part of tb_flags. It allowed to get rid of global variable to store pmlen. Also it allowed to simplify all the machinery around it. Thanks [v1]: Hi all, It looks like Zjpm v0.8 is almost frozen and we don't expect it change drastically anymore. Compared to the original implementation with explicit base and mask CSRs, we now only have several fixed options for number of masked bits which are set using existing CSRs. The changes have been tested with handwritten assembly tests and LLVM HWASAN test suite. Thanks Alexey Baturo (6): target/riscv: Remove obsolete pointer masking extension code. target/riscv: Add new CSR fields for S{sn,mn,m}pm extensions as part of Zjpm v0.8 target/riscv: Add helper functions to calculate current number of masked bits for pointer masking target/riscv: Add pointer masking tb flags target/riscv: Update address modify functions to take into account pointer masking target/riscv: Enable updates for pointer masking variables and thus enable pointer masking extension target/riscv/cpu.c | 18 +- target/riscv/cpu.h | 45 +++-- target/riscv/cpu_bits.h | 90 +--------- target/riscv/cpu_cfg.h | 3 + target/riscv/cpu_helper.c | 92 +++++----- target/riscv/csr.c | 337 ++--------------------------------- target/riscv/machine.c | 15 +- target/riscv/pmp.c | 13 +- target/riscv/pmp.h | 11 +- target/riscv/translate.c | 47 ++--- target/riscv/vector_helper.c | 12 +- 11 files changed, 148 insertions(+), 535 deletions(-)