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[217.169.11.214]) by smtp.gmail.com with ESMTPSA id n16-20020a05600c4f9000b0040d62f97e3csm20274444wmq.10.2024.01.15.08.25.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Jan 2024 08:25:27 -0800 (PST) From: Rob Bradford To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, atishp@rivosinc.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liwei1518@gmail.com, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, Rob Bradford Subject: [PATCH 0/2] target/riscv: Add support for Zaamo & Zalrsc Date: Mon, 15 Jan 2024 16:25:23 +0000 Message-ID: <20240115162525.63535-1-rbradford@rivosinc.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=rbradford@rivosinc.com; helo=mail-wm1-x329.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Introduce support for the proposed new (fast-track) Zaamo and Zalrsc extensions [1] which represent the AMO and LR/SC subsets of the A extension. The motivation for the subsets being available separately is that certain classes of CPUs may choose to only implement a subset for architectural convenience. Since this extension is not frozen these are advertised by "x-zaamo" and "x-zalrsc" options. Beyond adding the extension infrastructure the only changes required are to allow the atomic instructions under either A or the appropriate subset extension. To ensure compatibility enabling the A instruction does not enable these two extensions - future hardware may choose to advertise support for A and both these extensions for maximum software support. This patch is based off riscv-to-apply.next due to conflicts with existing patches. Cheers, Rob [1] - https://github.com/riscv/riscv-zaamo-zalrsc Rob Bradford (2): target/riscv: Add Zaamo and Zalrsc extensions target/riscv: Check 'A' and split extensions for atomic instructions target/riscv/cpu.c | 5 +++ target/riscv/cpu_cfg.h | 2 + target/riscv/insn_trans/trans_rva.c.inc | 56 +++++++++++++++---------- 3 files changed, 41 insertions(+), 22 deletions(-)