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([152.234.127.94]) by smtp.gmail.com with ESMTPSA id db3-20020a17090ad64300b0028e245501e7sm9866446pjb.4.2024.01.22.08.11.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 08:11:15 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, richard.henderson@linaro.org, Daniel Henrique Barboza Subject: [PATCH v4 00/13] target/riscv: add 'cpu->cfg.vlenb', remove Date: Mon, 22 Jan 2024 13:10:54 -0300 Message-ID: <20240122161107.26737-1-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=dbarboza@ventanamicro.com; helo=mail-pj1-x1030.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi, This new version is rebased with a newer riscv-to-apply.next branch (@ 096b6b0729). No other changes made. All patches acked. v4 link: https://lore.kernel.org/qemu-riscv/20240116205817.344178-1-dbarboza@ventanamicro.com/ Daniel Henrique Barboza (13): target/riscv: add 'vlenb' field in cpu->cfg target/riscv/csr.c: use 'vlenb' instead of 'vlen' target/riscv/gdbstub.c: use 'vlenb' instead of shifting 'vlen' target/riscv/insn_trans/trans_rvbf16.c.inc: use cpu->cfg.vlenb target/riscv/insn_trans/trans_rvv.c.inc: use 'vlenb' target/riscv/insn_trans/trans_rvvk.c.inc: use 'vlenb' target/riscv/vector_helper.c: use 'vlenb' target/riscv/vector_helper.c: use vlenb in HELPER(vsetvl) target/riscv/insn_trans/trans_rvv.c.inc: use 'vlenb' in MAXSZ() target/riscv/cpu.h: use 'vlenb' in vext_get_vlmax() target/riscv: change vext_get_vlmax() arguments trans_rvv.c.inc: use vext_get_vlmax() in trans_vrgather_v*() target/riscv/cpu.c: remove cpu->cfg.vlen target/riscv/cpu.c | 12 +- target/riscv/cpu.h | 14 +- target/riscv/cpu_cfg.h | 2 +- target/riscv/cpu_helper.c | 11 +- target/riscv/csr.c | 4 +- target/riscv/gdbstub.c | 6 +- target/riscv/insn_trans/trans_rvbf16.c.inc | 12 +- target/riscv/insn_trans/trans_rvv.c.inc | 152 ++++++++++----------- target/riscv/insn_trans/trans_rvvk.c.inc | 16 +-- target/riscv/tcg/tcg-cpu.c | 4 +- target/riscv/vector_helper.c | 43 +++--- 11 files changed, 148 insertions(+), 128 deletions(-)