mbox series

[v5,0/7] riscv: set vstart_eq_zero on mark_vs_dirty

Message ID 20240221022252.252872-1-dbarboza@ventanamicro.com (mailing list archive)
Headers show
Series riscv: set vstart_eq_zero on mark_vs_dirty | expand

Message

Daniel Henrique Barboza Feb. 21, 2024, 2:22 a.m. UTC
Hi,

In this new version we removed the remaining brconds() from
trans_rvbf16.c.inc like Richard suggested in patch 3. Richard, I kept
your ack in that patch.

This change caused the 'cpu_vstart' global to be unused. A new patch (4)
was added to remove it.

Series based on alistair/riscv-to-apply.next.

Patches missing acks: patch 4.

Changes from v4:
- patch 3:
  - remove vstart >= vl and vl = 0 brconds from trans_fvbf16.c.inc
- patch 4 (new):
  - remove cpu_vstart
- v4 link: https://lore.kernel.org/qemu-riscv/20240220222510.209448-1-dbarboza@ventanamicro.com/


Daniel Henrique Barboza (6):
  trans_rvv.c.inc: mark_vs_dirty() before loads and stores
  trans_rvv.c.inc: remove 'is_store' bool from load/store fns
  target/riscv: remove 'over' brconds from vector trans
  target/riscv/translate.c: remove 'cpu_vstart' global
  target/riscv/vector_helper.c: set vstart = 0 in GEN_VEXT_VSLIDEUP_VX()
  trans_rvv.c.inc: remove redundant mark_vs_dirty() calls

Ivan Klokov (1):
  target/riscv: Clear vstart_qe_zero flag

 target/riscv/insn_trans/trans_rvbf16.c.inc |  18 +-
 target/riscv/insn_trans/trans_rvv.c.inc    | 292 ++++++---------------
 target/riscv/insn_trans/trans_rvvk.c.inc   |  30 +--
 target/riscv/translate.c                   |  10 +-
 target/riscv/vector_helper.c               |   1 +
 5 files changed, 100 insertions(+), 251 deletions(-)

Comments

Daniel Henrique Barboza Feb. 21, 2024, 9:24 p.m. UTC | #1
Richard,

On 2/20/24 23:22, Daniel Henrique Barboza wrote:
> Hi,
> 
> In this new version we removed the remaining brconds() from
> trans_rvbf16.c.inc like Richard suggested in patch 3. Richard, I kept
> your ack in that patch.
> 
> This change caused the 'cpu_vstart' global to be unused. A new patch (4)
> was added to remove it.
> 
> Series based on alistair/riscv-to-apply.next.
> 
> Patches missing acks: patch 4.


I missed your acks from v4 in patches 1 and 2 . I'll add them back in the next
version.


Thanks,


Daniel

> 
> Changes from v4:
> - patch 3:
>    - remove vstart >= vl and vl = 0 brconds from trans_fvbf16.c.inc
> - patch 4 (new):
>    - remove cpu_vstart
> - v4 link: https://lore.kernel.org/qemu-riscv/20240220222510.209448-1-dbarboza@ventanamicro.com/
> 
> 
> Daniel Henrique Barboza (6):
>    trans_rvv.c.inc: mark_vs_dirty() before loads and stores
>    trans_rvv.c.inc: remove 'is_store' bool from load/store fns
>    target/riscv: remove 'over' brconds from vector trans
>    target/riscv/translate.c: remove 'cpu_vstart' global
>    target/riscv/vector_helper.c: set vstart = 0 in GEN_VEXT_VSLIDEUP_VX()
>    trans_rvv.c.inc: remove redundant mark_vs_dirty() calls
> 
> Ivan Klokov (1):
>    target/riscv: Clear vstart_qe_zero flag
> 
>   target/riscv/insn_trans/trans_rvbf16.c.inc |  18 +-
>   target/riscv/insn_trans/trans_rvv.c.inc    | 292 ++++++---------------
>   target/riscv/insn_trans/trans_rvvk.c.inc   |  30 +--
>   target/riscv/translate.c                   |  10 +-
>   target/riscv/vector_helper.c               |   1 +
>   5 files changed, 100 insertions(+), 251 deletions(-)
>