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[v2,00/45] target/hppa: Misc improvements

Message ID 20240513074717.130949-1-richard.henderson@linaro.org (mailing list archive)
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Series target/hppa: Misc improvements | expand

Message

Richard Henderson May 13, 2024, 7:46 a.m. UTC
Most of the patches lead up to implementing CF_PCREL.
Along the way there is a grab bag of code updates (TCG_COND_TST*),
bug fixes (space changes during branch-in-branch-delay-slot),
and implementation of features (PSW bits B, X, T, H, L).

Sven reported that PSW L tripped up HP/UX, so possibly there's
something wrong there, but that's right at the end of the patch set.
So I'd like some feedback on the rest leading up to that too.

Changes for v2:
  - Rebase and update for tcg_cflags_set.


r~


Richard Henderson (45):
  target/hppa: Move cpu_get_tb_cpu_state out of line
  target/hppa: Use hppa_form_gva_psw in hppa_cpu_get_pc
  target/hppa: Move constant destination check into use_goto_tb
  target/hppa: Pass displacement to do_dbranch
  target/hppa: Allow prior nullification in do_ibranch
  target/hppa: Use CF_BP_PAGE instead of cpu_breakpoint_test
  target/hppa: Add install_iaq_entries
  target/hppa: Add install_link
  target/hppa: Delay computation of IAQ_Next
  target/hppa: Skip nullified insns in unconditional dbranch path
  target/hppa: Simplify TB end
  target/hppa: Add IASQ entries to DisasContext
  target/hppa: Add space arguments to install_iaq_entries
  target/hppa: Add space argument to do_ibranch
  target/hppa: Use umax in do_ibranch_priv
  target/hppa: Always make a copy in do_ibranch_priv
  target/hppa: Introduce and use DisasIAQE for branch management
  target/hppa: Use displacements in DisasIAQE
  target/hppa: Rename cond_make_* helpers
  target/hppa: Use TCG_COND_TST* in do_cond
  target/hppa: Use TCG_COND_TST* in do_log_cond
  target/hppa: Use TCG_COND_TST* in do_unit_zero_cond
  target/hppa: Use TCG_COND_TST* in do_unit_addsub
  target/hppa: Use TCG_COND_TST* in trans_bb_imm
  target/hppa: Use registerfields.h for FPSR
  target/hppa: Use TCG_COND_TST* in trans_ftest
  target/hppa: Remove cond_free
  target/hppa: Introduce DisasDelayException
  target/hppa: Use delay_excp for conditional traps
  target/hppa: Use delay_excp for conditional trap on overflow
  linux-user/hppa: Force all code addresses to PRIV_USER
  target/hppa: Store full iaoq_f and page offset of iaoq_b in TB
  target/hppa: Do not mask in copy_iaoq_entry
  target/hppa: Improve hppa_cpu_dump_state
  target/hppa: Split PSW X and B into their own field
  target/hppa: Manage PSW_X and PSW_B in translator
  target/hppa: Implement PSW_B
  target/hppa: Implement PSW_X
  target/hppa: Drop tlb_entry return from hppa_get_physical_address
  target/hppa: Adjust priv for B,GATE at runtime
  target/hppa: Implement CF_PCREL
  target/hppa: Implement PSW_T
  target/hppa: Implement PSW_H, PSW_L
  target/hppa: Log cpu state at interrupt
  target/hppa: Log cpu state on return-from-interrupt

 linux-user/hppa/target_cpu.h |    4 +-
 target/hppa/cpu.h            |   80 +--
 target/hppa/helper.h         |    3 +-
 linux-user/elfload.c         |    4 +-
 linux-user/hppa/cpu_loop.c   |   14 +-
 linux-user/hppa/signal.c     |    6 +-
 target/hppa/cpu.c            |   92 ++-
 target/hppa/fpu_helper.c     |   26 +-
 target/hppa/gdbstub.c        |    6 +
 target/hppa/helper.c         |   66 +-
 target/hppa/int_helper.c     |   33 +-
 target/hppa/mem_helper.c     |   99 +--
 target/hppa/op_helper.c      |   17 +-
 target/hppa/sys_helper.c     |   12 +
 target/hppa/translate.c      | 1232 ++++++++++++++++++----------------
 15 files changed, 947 insertions(+), 747 deletions(-)

Comments

Helge Deller May 14, 2024, 2:02 p.m. UTC | #1
On 5/13/24 09:46, Richard Henderson wrote:
> Most of the patches lead up to implementing CF_PCREL.
> Along the way there is a grab bag of code updates (TCG_COND_TST*),
> bug fixes (space changes during branch-in-branch-delay-slot),
> and implementation of features (PSW bits B, X, T, H, L).
>
> Sven reported that PSW L tripped up HP/UX, so possibly there's
> something wrong there, but that's right at the end of the patch set.
> So I'd like some feedback on the rest leading up to that too.

I do see the PSW_L issue as well (32-bit machine when starting HP-UX 11).
When leaving out patches 42-45 ("target/hppa: Implement PSW_T" and following)
I can boot 32-bit HP-UX 10 and 11.

Will review the patches now individually, but maybe you should
push the patches 1-41 first and we take the PSWT/L patches later?

Helge

>
> Changes for v2:
>    - Rebase and update for tcg_cflags_set.
>
>
> r~
>
>
> Richard Henderson (45):
>    target/hppa: Move cpu_get_tb_cpu_state out of line
>    target/hppa: Use hppa_form_gva_psw in hppa_cpu_get_pc
>    target/hppa: Move constant destination check into use_goto_tb
>    target/hppa: Pass displacement to do_dbranch
>    target/hppa: Allow prior nullification in do_ibranch
>    target/hppa: Use CF_BP_PAGE instead of cpu_breakpoint_test
>    target/hppa: Add install_iaq_entries
>    target/hppa: Add install_link
>    target/hppa: Delay computation of IAQ_Next
>    target/hppa: Skip nullified insns in unconditional dbranch path
>    target/hppa: Simplify TB end
>    target/hppa: Add IASQ entries to DisasContext
>    target/hppa: Add space arguments to install_iaq_entries
>    target/hppa: Add space argument to do_ibranch
>    target/hppa: Use umax in do_ibranch_priv
>    target/hppa: Always make a copy in do_ibranch_priv
>    target/hppa: Introduce and use DisasIAQE for branch management
>    target/hppa: Use displacements in DisasIAQE
>    target/hppa: Rename cond_make_* helpers
>    target/hppa: Use TCG_COND_TST* in do_cond
>    target/hppa: Use TCG_COND_TST* in do_log_cond
>    target/hppa: Use TCG_COND_TST* in do_unit_zero_cond
>    target/hppa: Use TCG_COND_TST* in do_unit_addsub
>    target/hppa: Use TCG_COND_TST* in trans_bb_imm
>    target/hppa: Use registerfields.h for FPSR
>    target/hppa: Use TCG_COND_TST* in trans_ftest
>    target/hppa: Remove cond_free
>    target/hppa: Introduce DisasDelayException
>    target/hppa: Use delay_excp for conditional traps
>    target/hppa: Use delay_excp for conditional trap on overflow
>    linux-user/hppa: Force all code addresses to PRIV_USER
>    target/hppa: Store full iaoq_f and page offset of iaoq_b in TB
>    target/hppa: Do not mask in copy_iaoq_entry
>    target/hppa: Improve hppa_cpu_dump_state
>    target/hppa: Split PSW X and B into their own field
>    target/hppa: Manage PSW_X and PSW_B in translator
>    target/hppa: Implement PSW_B
>    target/hppa: Implement PSW_X
>    target/hppa: Drop tlb_entry return from hppa_get_physical_address
>    target/hppa: Adjust priv for B,GATE at runtime
>    target/hppa: Implement CF_PCREL
>    target/hppa: Implement PSW_T
>    target/hppa: Implement PSW_H, PSW_L
>    target/hppa: Log cpu state at interrupt
>    target/hppa: Log cpu state on return-from-interrupt
>
>   linux-user/hppa/target_cpu.h |    4 +-
>   target/hppa/cpu.h            |   80 +--
>   target/hppa/helper.h         |    3 +-
>   linux-user/elfload.c         |    4 +-
>   linux-user/hppa/cpu_loop.c   |   14 +-
>   linux-user/hppa/signal.c     |    6 +-
>   target/hppa/cpu.c            |   92 ++-
>   target/hppa/fpu_helper.c     |   26 +-
>   target/hppa/gdbstub.c        |    6 +
>   target/hppa/helper.c         |   66 +-
>   target/hppa/int_helper.c     |   33 +-
>   target/hppa/mem_helper.c     |   99 +--
>   target/hppa/op_helper.c      |   17 +-
>   target/hppa/sys_helper.c     |   12 +
>   target/hppa/translate.c      | 1232 ++++++++++++++++++----------------
>   15 files changed, 947 insertions(+), 747 deletions(-)
>