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[152.2.133.133]) by smtp.gmail.com with ESMTPSA id af79cd13be357-794abcc0f0fsm79816585a.38.2024.05.24.10.08.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 May 2024 10:08:04 -0700 (PDT) From: Don Porter To: qemu-devel@nongnu.org Cc: dave@treblig.org, peter.maydell@linaro.org, nadav.amit@gmail.com, richard.henderson@linaro.org, Don Porter Subject: [PATCH v2 0/6] Rework x86 page table walks Date: Fri, 24 May 2024 13:07:42 -0400 Message-Id: <20240524170748.1842030-1-porter@cs.unc.edu> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::731; envelope-from=porter@cs.unc.edu; helo=mail-qk1-x731.google.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This version of the 'info pg' command adopts Peter Maydell's request to write some guest-agnostic page table iterator and accessor code, along with architecture-specific hooks. The first patch in this series contributes a generic page table iterator and an x86 instantiation. As a client, we first introduce an 'info pg' monitor command, as well as a compressing callback hook for creating succinct page table representations. After this, each successive patch replaces an exisitng x86 page table walker with a use of common iterator code. I could use advice on how to ensure this is sufficiently well tested. I used 'make check' and 'make check-avocado', which both pass; what is the typical standard for testing something like a page table related change? As far as generality, I have only attempted this on x86, but I expect the design would work for any similar radix-tree style page table. I am still new enough to the code base that I wasn't certain about where to put the generic code, as well as naming conventions. Per David Gilbert's suggestion, I was careful to ensure that monitor calls do not perturb TLB state (see the read-only flag in some functions). I appreciate Nadav's suggestion about other ways to pursue the same goal: I ended up deciding I would like to try my hand at consolidating the x86 page table code. Don Porter (6): Add an "info pg" command that prints the current page tables Convert 'info tlb' to use generic iterator Convert 'info mem' to use generic iterator Convert x86_cpu_get_memory_mapping() to use generic iterators Move tcg implementation of x86 get_physical_address into common helper code. Convert x86_mmu_translate() to use common code. hmp-commands-info.hx | 26 + include/monitor/hmp-target.h | 1 + target/i386/arch_memory_mapping.c | 735 +++++++++++++++------- target/i386/cpu.h | 66 ++ target/i386/helper.c | 518 ++++++++++++---- target/i386/monitor.c | 883 +++++++++++++-------------- target/i386/tcg/sysemu/excp_helper.c | 555 +---------------- 7 files changed, 1439 insertions(+), 1345 deletions(-) --- 2.34.1