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[174.21.72.5]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-6f8fd1d4d5fsm5265876b3a.165.2024.05.27.14.19.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 May 2024 14:19:13 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: git@xen0n.name, gaosong@loongson.cn Subject: [PATCH 00/18] tcg/loongarch64: Support v64 and v256 Date: Mon, 27 May 2024 14:18:54 -0700 Message-Id: <20240527211912.14060-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Some guests only have, or additionally have, 64-bit vectors. For example arm, mips, sparc. So it's best to enable this whenever we can. As with tcg/i386, use 64-bit loads and stores but 128-bit vector registers. If LASX is available (all current loongarch64 cpus?), we have 256-bit vectors as well. Useful for guests that support such things, e.g. aarch64, i386, and loongarch64 itself. r~ Richard Henderson (18): tcg/loongarch64: Import LASX, FP insns tcg/loongarch64: Use fp load/store for I32 and I64 into vector regs tcg/loongarch64: Handle i32 and i64 moves between gr and fr tcg/loongarch64: Support TCG_TYPE_V64 util/loongarch64: Detect LASX vector support tcg/loongarch64: Simplify tcg_out_dup_vec tcg/loongarch64: Support LASX in tcg_out_dup_vec tcg/loongarch64: Support LASX in tcg_out_dupm_vec tcg/loongarch64: Use tcg_out_dup_vec in tcg_out_dupi_vec tcg/loongarch64: Support LASX in tcg_out_dupi_vec tcg/loongarch64: Simplify tcg_out_addsub_vec tcg/loongarch64: Support LASX in tcg_out_addsub_vec tcg/loongarch64: Split out vdvjvk in tcg_out_vec_op tcg/loongarch64: Support LASX in tcg_out_{mov,ld,st} tcg/loongarch64: Remove temp_vec from tcg_out_vec_op tcg/loongarch64: Split out vdvjukN in tcg_out_vec_op tcg/loongarch64: Support LASX in tcg_out_vec_op tcg/loongarch64: Enable v256 with LASX host/include/loongarch64/host/cpuinfo.h | 1 + tcg/loongarch64/tcg-target.h | 4 +- util/cpuinfo-loongarch.c | 1 + tcg/loongarch64/tcg-insn-defs.c.inc | 6181 ++++++++--------------- tcg/loongarch64/tcg-target.c.inc | 575 ++- 5 files changed, 2461 insertions(+), 4301 deletions(-)