From patchwork Tue Jun 4 04:14:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alvin Chang X-Patchwork-Id: 13684617 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3B08DC25B74 for ; Tue, 4 Jun 2024 04:42:15 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sELzJ-0007yM-1e; Tue, 04 Jun 2024 00:41:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sELz9-0007xv-W4 for qemu-devel@nongnu.org; Tue, 04 Jun 2024 00:41:24 -0400 Received: from 60-248-80-70.hinet-ip.hinet.net ([60.248.80.70] helo=Atcsqr.andestech.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sELz7-0000HB-Gj for qemu-devel@nongnu.org; Tue, 04 Jun 2024 00:41:23 -0400 Received: from Atcsqr.andestech.com (localhost [127.0.0.2] (may be forged)) by Atcsqr.andestech.com with ESMTP id 4544F7tp080370 for ; Tue, 4 Jun 2024 12:15:07 +0800 (+08) (envelope-from alvinga@andestech.com) Received: from mail.andestech.com (ATCPCS16.andestech.com [10.0.1.222]) by Atcsqr.andestech.com with ESMTP id 4544EssW080133; Tue, 4 Jun 2024 12:14:54 +0800 (+08) (envelope-from alvinga@andestech.com) Received: from alvinga-VirtualBox.andestech.com (10.0.13.68) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.498.0; Tue, 4 Jun 2024 12:14:52 +0800 To: , CC: , , , , , Alvin Chang Subject: [PATCH v5 0/4] RISC-V: Modularize common match conditions for trigger Date: Tue, 4 Jun 2024 12:14:41 +0800 Message-ID: <20240604041445.244768-1-alvinga@andestech.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Originating-IP: [10.0.13.68] X-DNSRBL: X-MAIL: Atcsqr.andestech.com 4544F7tp080370 Received-SPF: pass client-ip=60.248.80.70; envelope-from=alvinga@andestech.com; helo=Atcsqr.andestech.com X-Spam_score_int: -8 X-Spam_score: -0.9 X-Spam_bar: / X-Spam_report: (-0.9 / 5.0 requ) BAYES_00=-1.9, RDNS_DYNAMIC=0.982, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, TVD_RCVD_IP=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Alvin Chang X-Patchwork-Original-From: Alvin Chang via From: Alvin Chang Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org According to RISC-V Debug specification ratified version 0.13 [1] (also applied to version 1.0 [2] but it has not been ratified yet), the enabled privilege levels of the trigger is common match conditions for all the types of the trigger. This series modularize the code for checking the privilege levels of type 2/3/6 triggers by implementing functions trigger_common_match() and trigger_priv_match(). Additional match conditions, such as CSR tcontrol and textra, can be further implemented into trigger_common_match() in the future. [1]: https://github.com/riscv/riscv-debug-spec/releases/tag/task_group_vote [2]: https://github.com/riscv/riscv-debug-spec/releases/tag/1.0.0-rc1-asciidoc Changes from v4: - Rebasing on riscv-to-apply.next Changes from v3: - Change this series to target Debug Spec. version 0.13 Changes from v2: - Explicitly mention the targeting version of RISC-V Debug Spec. Changes from v1: - Fix typo - Add commit description for changing behavior of looping the triggers when we check type 2 triggers. Alvin Chang (4): target/riscv: Add functions for common matching conditions of trigger target/riscv: Apply modularized matching conditions for breakpoint target/riscv: Apply modularized matching conditions for watchpoint target/riscv: Apply modularized matching conditions for icount trigger target/riscv/debug.c | 129 ++++++++++++++++++++++++++++--------------- 1 file changed, 85 insertions(+), 44 deletions(-)