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Thu, 27 Jun 2024 07:06:31 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHi+lK2VdJAZfAn23TwjoLEbsjYVdd/XjEblNr0E7WD8Z8OwDGMtyOASOi9Pa4mLM5jTadbeg== X-Received: by 2002:a17:907:c306:b0:a72:6055:7886 with SMTP id a640c23a62f3a-a7260557953mr931629266b.24.1719497190051; Thu, 27 Jun 2024 07:06:30 -0700 (PDT) Received: from avogadro.local ([151.48.235.205]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a729d71f6f9sm63082466b.74.2024.06.27.07.06.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Jun 2024 07:06:29 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Xiaoyao Li , John Allen Subject: [PATCH 0/2] target/i386: drop AMD machine check bits from Intel CPUID Date: Thu, 27 Jun 2024 16:06:26 +0200 Message-ID: <20240627140628.1025317-1-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.2 MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -22 X-Spam_score: -2.3 X-Spam_bar: -- X-Spam_report: (-2.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.212, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The recent addition of the SUCCOR bit to kvm_arch_get_supported_cpuid() causes the bit to be visible when "-cpu host" VMs are started on Intel processors. While this should in principle be harmless, it's not tidy and we don't even know for sure that it doesn't cause any guest OS to take unexpected paths. So plumb in a mechanism for x86_cpu_get_supported_feature_word() to return different values depending on the *guest* CPU vendor (which, for KVM, is by default the same as the host vendor); and then use it to hide the SUCCOR bit if the guest has non-AMD vendor. Paolo Bonzini (2): target/i386: pass X86CPU to x86_cpu_get_supported_feature_word target/i386: drop AMD machine check bits from Intel CPUID target/i386/cpu.h | 3 +-- target/i386/cpu.c | 29 +++++++++++++++++++++-------- target/i386/kvm/kvm-cpu.c | 2 +- 3 files changed, 23 insertions(+), 11 deletions(-)