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[v2,0/3] target/ppc: Update vector insns to use 128 bit

Message ID 20240630120157.259233-1-rathc@linux.ibm.com (mailing list archive)
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Series target/ppc: Update vector insns to use 128 bit | expand

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Chinmay Rath June 30, 2024, 12:01 p.m. UTC 
Updating a bunch of VMX and VSX storage access instructions to use
tcg_gen_qemu_ld/st_i128 instead of using tcg_gen_qemu_ld/st_i64 in
succession; as suggested by Richard, in my decodetree patches.
Plus some minor clean-ups to facilitate the above in case of VMX insns.

Change log:

v2 : Applied IFALIGN_PAIR memop changes in patches 2/3 and 3/3,
based on review comments by Richard in v1.

v1 : https://lore.kernel.org/qemu-devel/20240621114604.868415-1-rathc@linux.ibm.com/

Chinmay Rath (3):
  target/ppc: Move get/set_avr64 functions to vmx-impl.c.inc.
  target/ppc: Update VMX storage access insns to use
    tcg_gen_qemu_ld/st_i128.
  target/ppc : Update VSX storage access insns to use tcg_gen_qemu
    _ld/st_i128.

 target/ppc/translate.c              | 10 -----
 target/ppc/translate/vmx-impl.c.inc | 52 ++++++++++++---------
 target/ppc/translate/vsx-impl.c.inc | 70 +++++++++++++----------------
 3 files changed, 61 insertions(+), 71 deletions(-)