| Message ID | 20240703123449.1108-1-zhiwei_liu@linux.alibaba.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | target/riscv: Expose RV32 cpu to RV64 QEMU | expand |
Hi, On 3/7/24 14:34, LIU Zhiwei wrote: > From: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com> > > This patch set aims to expose 32-bit RISC-V cpu to RV64 QEMU. Thus > qemu-system-riscv64 can directly boot a RV32 Linux. > > This patch set has been tested with 6.9.0 Linux Image. > And add an avocado test in tests/avocado. > > v2: > Remove the line that was inadvertently left in PATCH v1 4/6. > Add an avocado test. > > v1: > https://mail.gnu.org/archive/html/qemu-riscv/2024-06/msg00501.html > > TANG Tiancheng (7): > target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI > target/riscv: Adjust PMP size for no-MMU RV64 QEMU running RV32 > target/riscv: Correct SXL return value for RV32 in RV64 QEMU > target/riscv: Detect sxl to set bit width for RV32 in RV64 > target/riscv: Correct mcause/scause bit width for RV32 in RV64 QEMU > target/riscv: Enable RV32 CPU support in RV64 QEMU > tests/avocado: Add an avocado test for riscv64 On what is that based? It fails when applying: Applying: target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI Applying: target/riscv: Adjust PMP size for no-MMU RV64 QEMU running RV32 Applying: target/riscv: Correct SXL return value for RV32 in RV64 QEMU Applying: target/riscv: Detect sxl to set bit width for RV32 in RV64 Applying: target/riscv: Correct mcause/scause bit width for RV32 in RV64 QEMU Applying: target/riscv: Enable RV32 CPU support in RV64 QEMU Patch failed at 0006 target/riscv: Enable RV32 CPU support in RV64 QEMU When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". error: patch failed: configs/targets/riscv64-softmmu.mak:1 error: configs/targets/riscv64-softmmu.mak: patch does not apply hint: Use 'git am --show-current-patch=diff' to see the failed patch
On 2024/7/3 21:08, Philippe Mathieu-Daudé wrote: > Hi, > > On 3/7/24 14:34, LIU Zhiwei wrote: >> From: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com> >> >> This patch set aims to expose 32-bit RISC-V cpu to RV64 QEMU. Thus >> qemu-system-riscv64 can directly boot a RV32 Linux. >> >> This patch set has been tested with 6.9.0 Linux Image. >> And add an avocado test in tests/avocado. >> >> v2: >> Remove the line that was inadvertently left in PATCH v1 4/6. >> Add an avocado test. >> >> v1: >> https://mail.gnu.org/archive/html/qemu-riscv/2024-06/msg00501.html >> >> TANG Tiancheng (7): >> target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI >> target/riscv: Adjust PMP size for no-MMU RV64 QEMU running RV32 >> target/riscv: Correct SXL return value for RV32 in RV64 QEMU >> target/riscv: Detect sxl to set bit width for RV32 in RV64 >> target/riscv: Correct mcause/scause bit width for RV32 in RV64 QEMU >> target/riscv: Enable RV32 CPU support in RV64 QEMU >> tests/avocado: Add an avocado test for riscv64 > > On what is that based? It fails when applying: Sorry. I forgot to rebase it to the master branch. And there is a riscv PR recently, which makes it fail to apply on the master branch. Thanks for pointing it out. The v3 patch set is here: https://lists.gnu.org/archive/html/qemu-riscv/2024-07/msg00069.html Thanks, Zhiwei > > Applying: target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI > Applying: target/riscv: Adjust PMP size for no-MMU RV64 QEMU running RV32 > Applying: target/riscv: Correct SXL return value for RV32 in RV64 QEMU > Applying: target/riscv: Detect sxl to set bit width for RV32 in RV64 > Applying: target/riscv: Correct mcause/scause bit width for RV32 in > RV64 QEMU > Applying: target/riscv: Enable RV32 CPU support in RV64 QEMU > Patch failed at 0006 target/riscv: Enable RV32 CPU support in RV64 QEMU > When you have resolved this problem, run "git am --continue". > If you prefer to skip this patch, run "git am --skip" instead. > To restore the original branch and stop patching, run "git am --abort". > error: patch failed: configs/targets/riscv64-softmmu.mak:1 > error: configs/targets/riscv64-softmmu.mak: patch does not apply > hint: Use 'git am --show-current-patch=diff' to see the failed patch
From: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com> This patch set aims to expose 32-bit RISC-V cpu to RV64 QEMU. Thus qemu-system-riscv64 can directly boot a RV32 Linux. This patch set has been tested with 6.9.0 Linux Image. And add an avocado test in tests/avocado. v2: Remove the line that was inadvertently left in PATCH v1 4/6. Add an avocado test. v1: https://mail.gnu.org/archive/html/qemu-riscv/2024-06/msg00501.html TANG Tiancheng (7): target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI target/riscv: Adjust PMP size for no-MMU RV64 QEMU running RV32 target/riscv: Correct SXL return value for RV32 in RV64 QEMU target/riscv: Detect sxl to set bit width for RV32 in RV64 target/riscv: Correct mcause/scause bit width for RV32 in RV64 QEMU target/riscv: Enable RV32 CPU support in RV64 QEMU tests/avocado: Add an avocado test for riscv64 configs/targets/riscv64-softmmu.mak | 2 +- hw/riscv/boot.c | 35 +++++++++++++++++++---------- hw/riscv/sifive_u.c | 3 ++- include/hw/riscv/boot.h | 4 +++- include/hw/riscv/boot_opensbi.h | 29 ++++++++++++++++++++++++ target/riscv/cpu.c | 17 ++++++++++---- target/riscv/cpu.h | 5 ++++- target/riscv/cpu_helper.c | 25 +++++++++++++++------ target/riscv/pmp.c | 2 +- tests/avocado/boot_linux_console.py | 35 +++++++++++++++++++++++++++++ 10 files changed, 129 insertions(+), 28 deletions(-)