[0/7] hpet: fixes for 64-bit mode and interrupt status registers

Message

Paolo Bonzini July 22, 2024, 12:05 p.m. UTC

The main fixes are in patches 1 and 5:

- switching level->edge was not lowering the interrupt and
  clearing ISR

- switching on the enable bit was not raising a level-triggered
  interrupt if the timer had fired

- the timer must be kept running even if not enabled, in
  order to set the ISR flag, so writes to HPET_TN_CFG must
  not call hpet_del_timer()

- 64-bit reads and writes must be implemented so that
  TN_SET_VAL is applied to both halves if the 64-bit counter
  is written with a single 8-byte write

Patch 6 improves the tracking of the HPET state, by storing
the full 64-bit target value of the counter (which is used
to set the corresponding QEMUTimer).  Patch 7 is a longstanding
TODO that is enabled by all these changes, limiting the maximum
timer frequency of a periodic timer.

Paolo


Paolo Bonzini (7):
  hpet: fix and cleanup persistence of interrupt status
  hpet: ignore high bits of comparator in 32-bit mode
  hpet: remove unnecessary variable "index"
  hpet: place read-only bits directly in "new_val"
  hpet: accept 64-bit reads and writes
  hpet: store full 64-bit target value of the counter
  hpet: avoid timer storms on periodic timers

 hw/timer/hpet.c       | 329 +++++++++++++++++++-----------------------
 hw/timer/trace-events |   4 +-
 2 files changed, 151 insertions(+), 182 deletions(-)