| Message ID | 20240730172343.5818-1-chalapathi.v@linux.ibm.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | hw/ppc: SPI model | expand |
Hello Chalapathi On 7/30/24 19:23, Chalapathi V wrote: > Hello, > > In patch v6 below issues detected during Coverity Scan were fixed. > - CID 1558831: Resource leaks (RESOURCE_LEAK) > Variable "rsp_payload" going out of scope leaks the storage it points to. > - CID 1558827: (OVERRUN) > Overrunning array "s->seq_op" of 8 bytes at byte offset 16 using index > "get_seq_index(s) + 1" (which evaluates to 16). You don't need to resend a v6 because the PowerNV SPI model is already merged upstream : https://gitlab.com/qemu-project/qemu/-/commit/29318db133d0b2523bda771f76aa50c08842527f What we would need now is a series of two patches on top of upstream fixing the issues reported by coverity. Each patch should contain a "Fixes: Coverity CID XYZxyz" tag. Thanks, C. > The qom-tree looks like below. > (qemu) info qom-tree > /machine (powernv10-machine) > /chip[0] (power10_v2.0-pnv-chip) > /pib_spic[0] (pnv-spi) > /pnv-spi-bus.0 (SSI) > /xscom-spi[0] (memory-region) > /pib_spic[1] (pnv-spi) > /pnv-spi-bus.1 (SSI) > /xscom-spi[0] (memory-region) > /pib_spic[2] (pnv-spi) > /pnv-spi-bus.2 (SSI) > /xscom-spi[0] (memory-region) > /pib_spic[3] (pnv-spi) > /pnv-spi-bus.3 (SSI) > /xscom-spi[0] (memory-region) > /pib_spic[4] (pnv-spi) > /pnv-spi-bus.4 (SSI) > /xscom-spi[0] (memory-region) > /pib_spic[5] (pnv-spi) > /pnv-spi-bus.5 (SSI) > /xscom-spi[0] (memory-region) > > (qemu) info qom-tree > /machine (powernv10-machine) > /peripheral-anon (container) > /device[0] (25csm04) > /WP#[0] (irq) > /ssi-gpio-cs[0] (irq) > > Patches overview in v6. > PATCH1: Remove ppc target dependency from include/hw/ppc/pnv_xscom.h so > that pnv_xscom.h can be included in hw/ssi/pnv_spi.c in PATCH2. > PATCH2: Create a PNV SPI model and implement configuration unit > to model SCOM registers. > PATCH3: Extend PNV SPI model: implement sequencer FSM and shift engine. > PATCH4: Add Microchip's SEEPROM 25csm04 model on top of m25p80. > PATCH5: Connect SPI controllers to p10 chip and connect cs lines. > PATCH6: Write a qtest pnv-spi-seeprom-test to check the SPI transactions > between spi controller and seeprom device. > > Test covered: > make check > make check-avocado > > Thank You, > Chalapathi > > Chalapathi V (6): > ppc/pnv: Remove ppc target dependency from pnv_xscom.h > hw/ssi: Add SPI model > hw/ssi: Extend SPI model > hw/block: Add Microchip's 25CSM04 to m25p80 > hw/ppc: SPI controller wiring to P10 chip > tests/qtest: Add pnv-spi-seeprom qtest > > include/hw/ppc/pnv_chip.h | 3 + > include/hw/ppc/pnv_xscom.h | 5 +- > include/hw/ssi/pnv_spi.h | 67 ++ > include/hw/ssi/pnv_spi_regs.h | 133 +++ > hw/block/m25p80.c | 3 + > hw/ppc/pnv.c | 21 +- > hw/ssi/pnv_spi.c | 1269 ++++++++++++++++++++++++++++ > tests/qtest/pnv-spi-seeprom-test.c | 110 +++ > hw/ppc/Kconfig | 3 + > hw/ssi/Kconfig | 4 + > hw/ssi/meson.build | 1 + > hw/ssi/trace-events | 21 + > tests/qtest/meson.build | 1 + > 13 files changed, 1639 insertions(+), 2 deletions(-) > create mode 100644 include/hw/ssi/pnv_spi.h > create mode 100644 include/hw/ssi/pnv_spi_regs.h > create mode 100644 hw/ssi/pnv_spi.c > create mode 100644 tests/qtest/pnv-spi-seeprom-test.c >
Hello, In patch v6 below issues detected during Coverity Scan were fixed. - CID 1558831: Resource leaks (RESOURCE_LEAK) Variable "rsp_payload" going out of scope leaks the storage it points to. - CID 1558827: (OVERRUN) Overrunning array "s->seq_op" of 8 bytes at byte offset 16 using index "get_seq_index(s) + 1" (which evaluates to 16). The qom-tree looks like below. (qemu) info qom-tree /machine (powernv10-machine) /chip[0] (power10_v2.0-pnv-chip) /pib_spic[0] (pnv-spi) /pnv-spi-bus.0 (SSI) /xscom-spi[0] (memory-region) /pib_spic[1] (pnv-spi) /pnv-spi-bus.1 (SSI) /xscom-spi[0] (memory-region) /pib_spic[2] (pnv-spi) /pnv-spi-bus.2 (SSI) /xscom-spi[0] (memory-region) /pib_spic[3] (pnv-spi) /pnv-spi-bus.3 (SSI) /xscom-spi[0] (memory-region) /pib_spic[4] (pnv-spi) /pnv-spi-bus.4 (SSI) /xscom-spi[0] (memory-region) /pib_spic[5] (pnv-spi) /pnv-spi-bus.5 (SSI) /xscom-spi[0] (memory-region) (qemu) info qom-tree /machine (powernv10-machine) /peripheral-anon (container) /device[0] (25csm04) /WP#[0] (irq) /ssi-gpio-cs[0] (irq) Patches overview in v6. PATCH1: Remove ppc target dependency from include/hw/ppc/pnv_xscom.h so that pnv_xscom.h can be included in hw/ssi/pnv_spi.c in PATCH2. PATCH2: Create a PNV SPI model and implement configuration unit to model SCOM registers. PATCH3: Extend PNV SPI model: implement sequencer FSM and shift engine. PATCH4: Add Microchip's SEEPROM 25csm04 model on top of m25p80. PATCH5: Connect SPI controllers to p10 chip and connect cs lines. PATCH6: Write a qtest pnv-spi-seeprom-test to check the SPI transactions between spi controller and seeprom device. Test covered: make check make check-avocado Thank You, Chalapathi Chalapathi V (6): ppc/pnv: Remove ppc target dependency from pnv_xscom.h hw/ssi: Add SPI model hw/ssi: Extend SPI model hw/block: Add Microchip's 25CSM04 to m25p80 hw/ppc: SPI controller wiring to P10 chip tests/qtest: Add pnv-spi-seeprom qtest include/hw/ppc/pnv_chip.h | 3 + include/hw/ppc/pnv_xscom.h | 5 +- include/hw/ssi/pnv_spi.h | 67 ++ include/hw/ssi/pnv_spi_regs.h | 133 +++ hw/block/m25p80.c | 3 + hw/ppc/pnv.c | 21 +- hw/ssi/pnv_spi.c | 1269 ++++++++++++++++++++++++++++ tests/qtest/pnv-spi-seeprom-test.c | 110 +++ hw/ppc/Kconfig | 3 + hw/ssi/Kconfig | 4 + hw/ssi/meson.build | 1 + hw/ssi/trace-events | 21 + tests/qtest/meson.build | 1 + 13 files changed, 1639 insertions(+), 2 deletions(-) create mode 100644 include/hw/ssi/pnv_spi.h create mode 100644 include/hw/ssi/pnv_spi_regs.h create mode 100644 hw/ssi/pnv_spi.c create mode 100644 tests/qtest/pnv-spi-seeprom-test.c