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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a83838c70afsm277611166b.15.2024.08.16.09.07.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Aug 2024 09:07:44 -0700 (PDT) From: Andrew Jones To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: palmer@dabbelt.com, alistair.francis@wdc.com, bmeng.cn@gmail.com, dbarboza@ventanamicro.com, Anup Patel Subject: [PATCH 0/2] hw/riscv/virt: Fix PCI devices with AIA Date: Fri, 16 Aug 2024 18:07:44 +0200 Message-ID: <20240816160743.220374-4-ajones@ventanamicro.com> X-Mailer: git-send-email 2.45.2 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=ajones@ventanamicro.com; helo=mail-ed1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Linux does not properly handle '#msi-cells=<0>' when searching for MSI controllers for PCI devices which results in the devices being unable to use MSIs. A patch for Linux has been sent[1] but until it, or something like it, is merged and in distro kernels we should stop adding the property. It's harmless to stop adding it since the absence of the property and a value of zero for the property mean the same thing according to the DT binding definition. The first patch stops adding the property by simply reverting the patch that started adding it and should be applied for 9.1 since it's a fix. The second patch allows users to bring it back by enabling a new machine property 'strict-dt' which is meant to be used for cases like these going forward. There's no rush for the second patch. [1] https://lore.kernel.org/all/20240816124957.130017-2-ajones@ventanamicro.com/ Thanks, drew Andrew Jones (2): Revert "hw/riscv/virt.c: imsics DT: add '#msi-cells'" hw/riscv/virt: Introduce strict-dt docs/system/riscv/virt.rst | 11 ++++++++++ hw/riscv/virt.c | 44 +++++++++++++++++++++++++++++--------- include/hw/riscv/virt.h | 1 + 3 files changed, 46 insertions(+), 10 deletions(-)