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[174.21.81.121]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2076afe9c61sm5635915ad.231.2024.09.11.19.41.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Sep 2024 19:41:15 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH v3 00/29] target/arm: AdvSIMD decodetree conversion, part 4 Date: Wed, 11 Sep 2024 19:40:45 -0700 Message-ID: <20240912024114.1097832-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Changes for v3: - Zero-extend results in Widen NeonGenNarrowEnvFn return to 64 bits Only patch 26 needs review. r~ Richard Henderson (29): target/arm: Replace tcg_gen_dupi_vec with constants in gengvec.c target/arm: Replace tcg_gen_dupi_vec with constants in translate-sve.c target/arm: Use cmpsel in gen_ushl_vec target/arm: Use cmpsel in gen_sshl_vec target/arm: Use tcg_gen_extract2_i64 for EXT target/arm: Convert EXT to decodetree target/arm: Convert TBL, TBX to decodetree target/arm: Convert UZP, TRN, ZIP to decodetree target/arm: Simplify do_reduction_op target/arm: Convert ADDV, *ADDLV, *MAXV, *MINV to decodetree target/arm: Convert FMAXNMV, FMINNMV, FMAXV, FMINV to decodetree target/arm: Convert FMOVI (scalar, immediate) to decodetree target/arm: Convert MOVI, FMOV, ORR, BIC (vector immediate) to decodetree target/arm: Introduce gen_gvec_sshr, gen_gvec_ushr target/arm: Fix whitespace near gen_srshr64_i64 target/arm: Convert handle_vec_simd_shri to decodetree target/arm: Convert handle_vec_simd_shli to decodetree target/arm: Use {,s}extract in handle_vec_simd_wshli target/arm: Convert SSHLL, USHLL to decodetree target/arm: Push tcg_rnd into handle_shri_with_rndacc target/arm: Split out subroutines of handle_shri_with_rndacc target/arm: Convert SHRN, RSHRN to decodetree target/arm: Convert handle_scalar_simd_shri to decodetree target/arm: Convert handle_scalar_simd_shli to decodetree target/arm: Convert VQSHL, VQSHLU to gvec target/arm: Widen NeonGenNarrowEnvFn return to 64 bits target/arm: Convert SQSHL, UQSHL, SQSHLU (immediate) to decodetree target/arm: Convert vector [US]QSHRN, [US]QRSHRN, SQSHRUN to decodetree target/arm: Convert scalar [US]QSHRN, [US]QRSHRN, SQSHRUN to decodetree target/arm/helper.h | 34 +- target/arm/tcg/translate.h | 14 +- target/arm/tcg/gengvec.c | 121 +- target/arm/tcg/neon_helper.c | 76 +- target/arm/tcg/translate-a64.c | 2081 +++++++++++++------------------ target/arm/tcg/translate-neon.c | 179 +-- target/arm/tcg/translate-sve.c | 128 +- target/arm/tcg/a64.decode | 257 ++++ target/arm/tcg/neon-dp.decode | 6 +- 9 files changed, 1393 insertions(+), 1503 deletions(-)