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[v6,00/17] bsd-user: Comprehensive RISCV Support

Message ID 20240915152554.8394-1-itachis@FreeBSD.org (mailing list archive)
Headers show
Series bsd-user: Comprehensive RISCV Support | expand

Message

Ajeet Singh Sept. 15, 2024, 3:25 p.m. UTC
Key Changes Compared to Version 5:
In target_arch_sigtramp.h removed static const,
as there was a compile-time constant issue

Mark Corbin (15):
  bsd-user: Implement RISC-V CPU initialization and main loop
  bsd-user: Add RISC-V CPU execution loop and syscall handling
  bsd-user: Implement RISC-V CPU register cloning and reset functions
  bsd-user: Implement RISC-V TLS register setup
  bsd-user: Add RISC-V ELF definitions and hardware capability detection
  bsd-user: Define RISC-V register structures and register copying
  bsd-user: Add RISC-V signal trampoline setup function
  bsd-user: Implement RISC-V sysarch system call emulation
  bsd-user: Add RISC-V thread setup and initialization support
  bsd-user: Define RISC-V VM parameters and helper functions
  bsd-user: Define RISC-V system call structures and constants
  bsd-user: Define RISC-V signal handling structures and constants
  bsd-user: Implement RISC-V signal trampoline setup functions
  bsd-user: Implement 'get_mcontext' for RISC-V
  bsd-user: Implement set_mcontext and get_ucontext_sigreturn for RISCV

Warner Losh (2):
  bsd-user: Add generic RISC-V64 target definitions
  bsd-user: Add RISC-V 64-bit Target Configuration and Debug XML Files

 bsd-user/riscv/signal.c               | 170 ++++++++++++++++++++++++++
 bsd-user/riscv/target.h               |  20 +++
 bsd-user/riscv/target_arch.h          |  27 ++++
 bsd-user/riscv/target_arch_cpu.c      |  29 +++++
 bsd-user/riscv/target_arch_cpu.h      | 147 ++++++++++++++++++++++
 bsd-user/riscv/target_arch_elf.h      |  42 +++++++
 bsd-user/riscv/target_arch_reg.h      |  88 +++++++++++++
 bsd-user/riscv/target_arch_signal.h   |  75 ++++++++++++
 bsd-user/riscv/target_arch_sigtramp.h |  41 +++++++
 bsd-user/riscv/target_arch_sysarch.h  |  41 +++++++
 bsd-user/riscv/target_arch_thread.h   |  47 +++++++
 bsd-user/riscv/target_arch_vmparam.h  |  53 ++++++++
 bsd-user/riscv/target_syscall.h       |  38 ++++++
 configs/targets/riscv64-bsd-user.mak  |   4 +
 14 files changed, 822 insertions(+)
 create mode 100644 bsd-user/riscv/signal.c
 create mode 100644 bsd-user/riscv/target.h
 create mode 100644 bsd-user/riscv/target_arch.h
 create mode 100644 bsd-user/riscv/target_arch_cpu.c
 create mode 100644 bsd-user/riscv/target_arch_cpu.h
 create mode 100644 bsd-user/riscv/target_arch_elf.h
 create mode 100644 bsd-user/riscv/target_arch_reg.h
 create mode 100644 bsd-user/riscv/target_arch_signal.h
 create mode 100644 bsd-user/riscv/target_arch_sigtramp.h
 create mode 100644 bsd-user/riscv/target_arch_sysarch.h
 create mode 100644 bsd-user/riscv/target_arch_thread.h
 create mode 100644 bsd-user/riscv/target_arch_vmparam.h
 create mode 100644 bsd-user/riscv/target_syscall.h
 create mode 100644 configs/targets/riscv64-bsd-user.mak

Comments

Daniel Henrique Barboza Sept. 16, 2024, 11:45 a.m. UTC | #1
Hi,

Please CC the RISC-V maintainer (Alistair, that I just CCed in this reply) in all RISC-V
related patches. It would be nice to also CC qemu-riscv@nongnu.org to get more visibility
from the RISC-V developers too.


This series won't build in a FreeBSD x86_64 host:

In file included from ../bsd-user/main.c:53:
../bsd-user/riscv/target_arch_cpu.h:126:13: error: call to undeclared function 'force_sig_fault'; ISO C99 and later do not support implicit function declarations [-Werror,-Wimplicit-function-declaration]
   126 |             force_sig_fault(signo, code, env->pc);
       |             ^
../bsd-user/riscv/target_arch_cpu.h:129:9: error: call to undeclared function 'process_pending_signals'; ISO C99 and later do not support implicit function declarations [-Werror,-Wimplicit-function-declaration]
   129 |         process_pending_signals(env);
       |         ^
../bsd-user/main.c:608:5: error: call to undeclared function 'signal_init'; ISO C99 and later do not support implicit function declarations [-Werror,-Wimplicit-function-declaration]
   608 |     signal_init();
       |     ^
3 errors generated.


You're missing the following header in patch 2:


diff --git a/bsd-user/riscv/target_arch_cpu.h b/bsd-user/riscv/target_arch_cpu.h
index 57abfbd556..a93ea3915a 100644
--- a/bsd-user/riscv/target_arch_cpu.h
+++ b/bsd-user/riscv/target_arch_cpu.h
@@ -21,6 +21,7 @@
  #define TARGET_ARCH_CPU_H
  
  #include "target_arch.h"
+#include "signal-common.h"
  
  #define TARGET_DEFAULT_CPU_MODEL "max"


Please CC dbarboza@ventanamicro.com in the v7 because I'll compile test this series to avoid
another pipeline fail that will hold the upstreaming of everything else.



Thanks,


Daniel


On 9/15/24 12:25 PM, Ajeet Singh wrote:
> Key Changes Compared to Version 5:
> In target_arch_sigtramp.h removed static const,
> as there was a compile-time constant issue
> 
> Mark Corbin (15):
>    bsd-user: Implement RISC-V CPU initialization and main loop
>    bsd-user: Add RISC-V CPU execution loop and syscall handling
>    bsd-user: Implement RISC-V CPU register cloning and reset functions
>    bsd-user: Implement RISC-V TLS register setup
>    bsd-user: Add RISC-V ELF definitions and hardware capability detection
>    bsd-user: Define RISC-V register structures and register copying
>    bsd-user: Add RISC-V signal trampoline setup function
>    bsd-user: Implement RISC-V sysarch system call emulation
>    bsd-user: Add RISC-V thread setup and initialization support
>    bsd-user: Define RISC-V VM parameters and helper functions
>    bsd-user: Define RISC-V system call structures and constants
>    bsd-user: Define RISC-V signal handling structures and constants
>    bsd-user: Implement RISC-V signal trampoline setup functions
>    bsd-user: Implement 'get_mcontext' for RISC-V
>    bsd-user: Implement set_mcontext and get_ucontext_sigreturn for RISCV
> 
> Warner Losh (2):
>    bsd-user: Add generic RISC-V64 target definitions
>    bsd-user: Add RISC-V 64-bit Target Configuration and Debug XML Files
> 
>   bsd-user/riscv/signal.c               | 170 ++++++++++++++++++++++++++
>   bsd-user/riscv/target.h               |  20 +++
>   bsd-user/riscv/target_arch.h          |  27 ++++
>   bsd-user/riscv/target_arch_cpu.c      |  29 +++++
>   bsd-user/riscv/target_arch_cpu.h      | 147 ++++++++++++++++++++++
>   bsd-user/riscv/target_arch_elf.h      |  42 +++++++
>   bsd-user/riscv/target_arch_reg.h      |  88 +++++++++++++
>   bsd-user/riscv/target_arch_signal.h   |  75 ++++++++++++
>   bsd-user/riscv/target_arch_sigtramp.h |  41 +++++++
>   bsd-user/riscv/target_arch_sysarch.h  |  41 +++++++
>   bsd-user/riscv/target_arch_thread.h   |  47 +++++++
>   bsd-user/riscv/target_arch_vmparam.h  |  53 ++++++++
>   bsd-user/riscv/target_syscall.h       |  38 ++++++
>   configs/targets/riscv64-bsd-user.mak  |   4 +
>   14 files changed, 822 insertions(+)
>   create mode 100644 bsd-user/riscv/signal.c
>   create mode 100644 bsd-user/riscv/target.h
>   create mode 100644 bsd-user/riscv/target_arch.h
>   create mode 100644 bsd-user/riscv/target_arch_cpu.c
>   create mode 100644 bsd-user/riscv/target_arch_cpu.h
>   create mode 100644 bsd-user/riscv/target_arch_elf.h
>   create mode 100644 bsd-user/riscv/target_arch_reg.h
>   create mode 100644 bsd-user/riscv/target_arch_signal.h
>   create mode 100644 bsd-user/riscv/target_arch_sigtramp.h
>   create mode 100644 bsd-user/riscv/target_arch_sysarch.h
>   create mode 100644 bsd-user/riscv/target_arch_thread.h
>   create mode 100644 bsd-user/riscv/target_arch_vmparam.h
>   create mode 100644 bsd-user/riscv/target_syscall.h
>   create mode 100644 configs/targets/riscv64-bsd-user.mak
>