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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(82310400026)(376014)(1800799024)(36860700013); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Sep 2024 17:29:25.8557 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ef67c15e-051f-4530-e3b0-08dcdf19ef25 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF00000011.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6314 Received-SPF: permerror client-ip=2a01:111:f403:2416::60e; envelope-from=Santosh.Shukla@amd.com; helo=NAM11-CO1-obe.outbound.protection.outlook.com X-Spam_score_int: -22 X-Spam_score: -2.3 X-Spam_bar: -- X-Spam_report: (-2.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.15, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Series adds following feature support for emulated amd vIOMMU 1) Pass Through(PT) mode 2) Interrupt Remapping(IR) mode 1) PT mode Introducing the shared 'nodma' memory region that can be aliased by all the devices in the PT mode. Shared memory with aliasing approach will help run VM faster when lot of devices attached to VM. 2) IR mode Shared IR memory region with aliasing approach proposed for the reason mentioned in 1). Also add support to invalidate Interrupt remaping table(IRT). Series based on e10cd93872c31332b002c933a798ab0bc51705a4 Testing: 1. nvme/fio testing for VM with > 255 vCPU with xtsup=on and x2apic enabled 2. Windows Server 2022 VM testing for > 255 vCPU. Change History: v3: - Incorporated Alejandro's v2 nits comment. V2: - https://lore.kernel.org/qemu-devel/20240916143116.169693-1-santosh.shukla@amd.com/ V1: - https://lore.kernel.org/all/20240904100257.184851-3-santosh.shukla@amd.com/T/ Suravee Suthikulpanit (5): amd_iommu: Rename variable mmio to mr_mmio amd_iommu: Add support for pass though mode amd_iommu: Use shared memory region for Interrupt Remapping amd_iommu: Send notification when invalidate interrupt entry cache amd_iommu: Check APIC ID > 255 for XTSup hw/i386/acpi-build.c | 4 +- hw/i386/amd_iommu.c | 98 +++++++++++++++++++++++++++++++++++--------- hw/i386/amd_iommu.h | 5 ++- 3 files changed, 85 insertions(+), 22 deletions(-)