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([189.79.22.174]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-720bc2eb64esm11749765b3a.168.2024.11.06.05.34.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Nov 2024 05:34:21 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Daniel Henrique Barboza Subject: [PATCH for-10.0 0/7] hw/riscv: riscv-iommu-sys device Date: Wed, 6 Nov 2024 10:34:00 -0300 Message-ID: <20241106133407.604587-1-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.45.2 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=dbarboza@ventanamicro.com; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi, Now that we have merged the base IOMMU support we can re-introduce the riscv-iommu-sys platform device that was taken away from the initial posting. Aside from adding support for the device in the 'virt' machine we're also adding MSI support for it, something that we weren't doing before. The Linux driver is then free to choose either MSI or WSI to use the device. Patches based on master. Daniel Henrique Barboza (5): hw/riscv/riscv-iommu.c: add riscv_iommu_instance_init() hw/riscv/riscv-iommu: parametrize CAP.IGS hw/riscv/virt.c, riscv-iommu-sys.c: add MSIx support hw/riscv/riscv-iommu: implement reset protocol docs/specs: add riscv-iommu-sys information Sunil V L (1): hw/riscv/virt: Add IOMMU as platform device if the option is set Tomasz Jeznach (1): hw/riscv: add riscv-iommu-sys platform device docs/specs/riscv-iommu.rst | 30 ++++- docs/system/riscv/virt.rst | 10 ++ hw/riscv/meson.build | 2 +- hw/riscv/riscv-iommu-bits.h | 6 + hw/riscv/riscv-iommu-pci.c | 21 +++ hw/riscv/riscv-iommu-sys.c | 256 ++++++++++++++++++++++++++++++++++++ hw/riscv/riscv-iommu.c | 114 +++++++++++----- hw/riscv/riscv-iommu.h | 5 + hw/riscv/trace-events | 4 + hw/riscv/virt.c | 108 ++++++++++++++- include/hw/riscv/iommu.h | 10 +- include/hw/riscv/virt.h | 6 +- 12 files changed, 530 insertions(+), 42 deletions(-) create mode 100644 hw/riscv/riscv-iommu-sys.c