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[77.188.106.228]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5d806feddfasm26116096a12.58.2025.01.08.01.25.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jan 2025 01:25:49 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Bin Meng , Fabiano Rosas , Guenter Roeck , Andrey Smirnov , Jean-Christophe Dubois , Peter Maydell , qemu-block@nongnu.org, Laurent Vivier , qemu-arm@nongnu.org, =?utf-8?q?Marc-An?= =?utf-8?q?dr=C3=A9_Lureau?= , Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bernhard Beschow Subject: [PATCH 00/14] i.MX and SDHCI improvements Date: Wed, 8 Jan 2025 10:25:24 +0100 Message-ID: <20250108092538.11474-1-shentey@gmail.com> X-Mailer: git-send-email 2.47.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::531; envelope-from=shentey@gmail.com; helo=mail-ed1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This series fixes some details in i.MX platform devices, improves SDHCI compatibility with U-Boot and modernizes some code. The first 6 patches are bugfixes 1/ resolving infinite loop in U-Boot esdhc driver, 2/ fixing a character echoing issue in imx-serial, 3/ fixing IRQ sharing issue in Designware PCIe emulation, and 4/ fixing GPIO level preservation across resets in imx-gpio. The IRQ sharing issue is fixed using a new device type "TYPE_SHARED_IRQ" which is inspired by TYPE_SPLIT_IRQ. Patches 7 and 8 modernize SD card emulation by turning presence and write-protect GPIOs into qdev GPIOs and then further allowing the GPIOs to be inverted, just like device tree allows. The rest of the series is cosmetics including turning DPRINTF() into trace events which eases debugging. Bernhard Beschow (14): hw/sd/sdhci: Set SDHC_NIS_DMA bit when appropriate hw/char/imx_serial: Fix reset value of UFCR register hw/char/imx_serial: Update all state before restarting ageing timer hw/core: Introduce TYPE_SHARED_IRQ hw/pci-host/designware: Expose MSI IRQ hw/gpio/imx_gpio: Don't clear input GPIO values upon reset hw/sd/sd: Remove legacy sd_set_cb() in favor of GPIOs hw/sd/sd: Allow for inverting polarities of presence and write-protect GPIOs hw/char/imx_serial: Turn some DPRINTF() statements into trace events hw/timer/imx_gpt: Remove unused define tests/qtest/libqos: Reuse TYPE_IMX_I2C define hw/i2c/imx_i2c: Convert DPRINTF() to trace events hw/misc/imx6_src: Convert DPRINTF() to trace events hw/gpio/imx_gpio: Turn DPRINTF() into trace events include/hw/arm/fsl-imx6.h | 4 +- include/hw/arm/fsl-imx7.h | 4 +- include/hw/char/imx_serial.h | 2 +- include/hw/core/shared-irq.h | 39 ++++++++++ include/hw/pci-host/designware.h | 1 + include/hw/sd/sdcard_legacy.h | 1 - hw/arm/fsl-imx6.c | 13 +++- hw/arm/fsl-imx7.c | 13 +++- hw/char/imx_serial.c | 65 ++++++++++------ hw/core/shared-irq.c | 88 ++++++++++++++++++++++ hw/gpio/imx_gpio.c | 17 ++--- hw/i2c/imx_i2c.c | 21 ++---- hw/misc/imx6_src.c | 23 ++---- hw/pci-host/designware.c | 7 +- hw/sd/sd.c | 39 +++++----- hw/sd/sdhci.c | 11 ++- hw/timer/imx_gpt.c | 4 - tests/qtest/libqos/arm-imx25-pdk-machine.c | 5 +- tests/qtest/libqos/i2c-imx.c | 4 +- hw/arm/Kconfig | 2 + hw/char/trace-events | 5 ++ hw/core/Kconfig | 3 + hw/core/meson.build | 1 + hw/gpio/trace-events | 5 ++ hw/i2c/trace-events | 5 ++ hw/misc/trace-events | 6 ++ 26 files changed, 280 insertions(+), 108 deletions(-) create mode 100644 include/hw/core/shared-irq.h create mode 100644 hw/core/shared-irq.c