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[77.183.181.102]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5db7364258csm6021077a12.1.2025.01.20.12.37.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jan 2025 12:37:57 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Paolo Bonzini , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Alistair Francis , Peter Maydell , Jean-Christophe Dubois , qemu-arm@nongnu.org, Andrey Smirnov , "Edgar E. Iglesias" , Bernhard Beschow Subject: [PATCH 00/21] Add i.MX 8M Plus EVK machine Date: Mon, 20 Jan 2025 21:37:27 +0100 Message-ID: <20250120203748.4687-1-shentey@gmail.com> X-Mailer: git-send-email 2.48.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::533; envelope-from=shentey@gmail.com; helo=mail-ed1-x533.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, FREEMAIL_REPLY=1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This series adds a new aarch64 machine to QEMU: i.MX 8M Plus EVK [1]. It allows for running Linux distributions such as Buildroot (freescale_imx8mpevk_defconfig) and Arch Linux [2] via direct kernel boot. U-Boot does not work yet. I plan to use this machine myself and I also want to make it available to a bigger audience, so I propose to add it to QEMU. My goal would be to have it added for 10.0. The series includes the unreviewed patches of [3] and is structured as follows: The first four patches fix some issues in device models reused by the new machine. Patches 5-18 add the machine step by step which includes documentation. Patches 19 and 20 add some further device models that I'd like to use with the new machine. The last patch is a fix I created during debugging but I don't rely on it. I've based some code on existing one (see "Based on" in file headers) and I'm unsure how to handle the licensing and attribution correctly -- advice welcome. The TCA6416 emulation is taken from the Xilinx fork where it is used in some cadence machines. Would the respective upstream maintainers be willing to maintain the device model upstream instead? [1] https://www.nxp.com/design/design-center/development-boards-and-designs/8MPLUSLPD4-EVK [2] https://archlinuxarm.org/platforms/armv8/generic [3] https://patchew.org/QEMU/20250111183711.2338-1-shentey@gmail.com/ Supersedes: 20250111183711.2338-1-shentey@gmail.com Bernhard Beschow (21): hw/char/imx_serial: Fix reset value of UFCR register hw/char/imx_serial: Update all state before restarting ageing timer hw/pci-host/designware: Expose MSI IRQ hw/usb/hcd-dwc3: Align global registers size with Linux hw/arm: Add i.MX 8M Plus EVK board hw/arm/fsl-imx8mp: Implement clock tree hw/arm/fsl-imx8mp: Add SNVS hw/arm/fsl-imx8mp: Add USDHC storage controllers hw/arm/fsl-imx8mp: Add PCIe support hw/arm/fsl-imx8mp: Add GPIO controllers hw/arm/fsl-imx8mp: Add I2C controllers hw/arm/fsl-imx8mp: Add SPI controllers hw/arm/fsl-imx8mp: Add watchdog support hw/arm/fsl-imx8mp: Implement gneral purpose timers hw/arm/fsl-imx8mp: Add Ethernet controller hw/arm/fsl-imx8mp: Add USB support hw/arm/fsl-imx8mp: Add boot ROM hw/arm/fsl-imx8mp: Add on-chip RAM hw/rtc: Add Ricoh RS5C372 RTC emulation hw/i2c: Import TCA6416 emulation from Xilinx hw/gpio/imx_gpio: Don't clear input GPIO values upon reset MAINTAINERS | 16 + docs/system/arm/imx8mp-evk.rst | 84 ++++ docs/system/target-arm.rst | 1 + include/hw/arm/fsl-imx6.h | 4 +- include/hw/arm/fsl-imx7.h | 4 +- include/hw/arm/fsl-imx8mp.h | 284 +++++++++++ include/hw/char/imx_serial.h | 2 +- include/hw/misc/imx8mp_ccm.h | 97 ++++ include/hw/pci-host/designware.h | 1 + include/hw/pci-host/fsl_imx8m_phy.h | 27 + include/hw/timer/imx_gpt.h | 1 + include/hw/usb/hcd-dwc3.h | 2 +- hw/arm/fsl-imx6.c | 13 +- hw/arm/fsl-imx7.c | 13 +- hw/arm/fsl-imx8mp.c | 736 ++++++++++++++++++++++++++++ hw/arm/imx8mp-evk.c | 74 +++ hw/char/imx_serial.c | 7 +- hw/gpio/imx_gpio.c | 1 - hw/gpio/tca6416.c | 122 +++++ hw/misc/imx8mp_ccm.c | 315 ++++++++++++ hw/pci-host/designware.c | 7 +- hw/pci-host/fsl_imx8m_phy.c | 88 ++++ hw/rtc/rs5c372.c | 227 +++++++++ hw/timer/imx_gpt.c | 25 + hw/usb/hcd-dwc3.c | 5 + hw/arm/Kconfig | 25 + hw/arm/meson.build | 2 + hw/gpio/Kconfig | 5 + hw/gpio/meson.build | 1 + hw/gpio/trace-events | 4 + hw/misc/meson.build | 1 + hw/pci-host/Kconfig | 3 + hw/pci-host/meson.build | 1 + hw/rtc/Kconfig | 5 + hw/rtc/meson.build | 1 + hw/rtc/trace-events | 4 + pc-bios/imx8mp-boot.rom | Bin 0 -> 258048 bytes pc-bios/meson.build | 1 + 38 files changed, 2195 insertions(+), 14 deletions(-) create mode 100644 docs/system/arm/imx8mp-evk.rst create mode 100644 include/hw/arm/fsl-imx8mp.h create mode 100644 include/hw/misc/imx8mp_ccm.h create mode 100644 include/hw/pci-host/fsl_imx8m_phy.h create mode 100644 hw/arm/fsl-imx8mp.c create mode 100644 hw/arm/imx8mp-evk.c create mode 100644 hw/gpio/tca6416.c create mode 100644 hw/misc/imx8mp_ccm.c create mode 100644 hw/pci-host/fsl_imx8m_phy.c create mode 100644 hw/rtc/rs5c372.c create mode 100644 pc-bios/imx8mp-boot.rom